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authorImre Deak <imre.deak@intel.com>2014-03-04 19:23:07 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-03-07 22:36:56 +0100
commitf8b79e58dc79f3f0edeb5194198a331374b11f82 (patch)
tree829c2379504153de2f2202d46309fe61f0cf17a8 /drivers/gpu/drm/i915/i915_dma.c
parent25eaa003bd186e415d94bf0191152f1cd7252d9a (diff)
downloadop-kernel-dev-f8b79e58dc79f3f0edeb5194198a331374b11f82.zip
op-kernel-dev-f8b79e58dc79f3f0edeb5194198a331374b11f82.tar.gz
drm/i915: vlv: factor out valleyview_display_irq_install
We'll need to disable/re-enable the display-side IRQs when turning off/on the VLV display power well. Factor out the helper functions for this. For now keep the display IRQs enabled by default, so the functionality doesn't change. This will be changed to enable/disable the IRQs on-demand when adding support for VLV power wells in an upcoming patch. v2: - take the irq spin lock for the whole enable/disable sequence as these can be called with interrupts enabled Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index e4d2b9f..65876c0 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1672,6 +1672,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
goto out_mtrrfree;
}
+ dev_priv->display_irqs_enabled = true;
intel_irq_init(dev);
intel_uncore_sanitize(dev);
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