summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_debugfs.c
diff options
context:
space:
mode:
authorJesse Barnes <jbarnes@virtuousgeek.org>2011-06-29 13:34:36 -0700
committerKeith Packard <keithp@keithp.com>2011-06-29 13:47:29 -0700
commit1c70c0cebd1295a42fec75045b8a6b4419cedef3 (patch)
tree4d647dcde647e0852736aa356ca4f4fc13a0085a /drivers/gpu/drm/i915/i915_debugfs.c
parent8eb2c0ee67f4853c0e433394f65ef8143a748c80 (diff)
downloadop-kernel-dev-1c70c0cebd1295a42fec75045b8a6b4419cedef3.zip
op-kernel-dev-1c70c0cebd1295a42fec75045b8a6b4419cedef3.tar.gz
drm/i915: enable ring freq scaling, RC6 and graphics turbo on Ivy Bridge v3
They use the same register interfaces, so we can simply enable the existing code on IVB. v2: - resolve conflict with ring freq scaling, we can enable it too v3: - resolve conflict again, this time on drm-intel-next Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8a5a032..ed62730 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -865,7 +865,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
MEMSTAT_VID_SHIFT);
seq_printf(m, "Current P-state: %d\n",
(rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
- } else if (IS_GEN6(dev)) {
+ } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
@@ -1131,7 +1131,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
int ret;
int gpu_freq, ia_freq;
- if (!IS_GEN6(dev)) {
+ if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
seq_printf(m, "unsupported on this chipset\n");
return 0;
}
OpenPOWER on IntegriCloud