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authorKenneth Graunke <kenneth@whitecape.org>2014-03-25 22:52:03 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-01 22:58:16 +0200
commit180b813ced1d1341c07f25e5195228100921d327 (patch)
tree8fc2143e31c198caba3eb9beea276b5c13fa31b9 /drivers/gpu/drm/i915/i915_cmd_parser.c
parent5c411bb18da78021e87cc192c5ed7ec0500f70ef (diff)
downloadop-kernel-dev-180b813ced1d1341c07f25e5195228100921d327.zip
op-kernel-dev-180b813ced1d1341c07f25e5195228100921d327.tar.gz
drm/i915: Add OACONTROL to the command parser register whitelist.
Mesa needs to be able to write OACONTROL in order to expose the Observability Architecture's performance counters via OpenGL. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> [danvet: Add comment that this is just a temporary work-around and that we need to check more things before we can allow OACONTROL writes for real everywhere.] [danvet 2: Squash in fixup to avoid a DRM_ERROR due to unsorted reg list, spotted by Jani.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_cmd_parser.c')
-rw-r--r--drivers/gpu/drm/i915/i915_cmd_parser.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index bae7c2f..788bd96 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -407,6 +407,12 @@ static const u32 gen7_render_regs[] = {
REG64(CL_PRIMITIVES_COUNT),
REG64(PS_INVOCATION_COUNT),
REG64(PS_DEPTH_COUNT),
+ /*
+ * FIXME: This is just to keep mesa working for now, we need to check
+ * that mesa resets this again and that it doesn't use any of the
+ * special modes which write into the gtt.
+ */
+ OACONTROL,
REG64(GEN7_SO_NUM_PRIMS_WRITTEN(0)),
REG64(GEN7_SO_NUM_PRIMS_WRITTEN(1)),
REG64(GEN7_SO_NUM_PRIMS_WRITTEN(2)),
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