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authorKeith Packard <keithp@keithp.com>2008-10-14 19:55:10 -0700
committerDave Airlie <airlied@linux.ie>2008-10-18 07:10:53 +1000
commitba1eb1d825fdef40f69871caf8e5842d00efbbc5 (patch)
tree73b45769022788532ee169c270e2792a229b1a40 /drivers/gpu/drm/drm_agpsupport.c
parent50aa253d820ad4577e2231202f2c8fd89f9dc4e6 (diff)
downloadop-kernel-dev-ba1eb1d825fdef40f69871caf8e5842d00efbbc5.zip
op-kernel-dev-ba1eb1d825fdef40f69871caf8e5842d00efbbc5.tar.gz
i915: Map status page cached for chips with GTT-based HWS location.
This should improve performance by avoiding uncached reads by the CPU (the point of having a status page), and may improve stability. This patch only affects G33, GM45 and G45 chips as those are the only ones using GTT-based HWS mappings. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/drm_agpsupport.c')
-rw-r--r--drivers/gpu/drm/drm_agpsupport.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/drm_agpsupport.c b/drivers/gpu/drm/drm_agpsupport.c
index 2639be2..3d33b82 100644
--- a/drivers/gpu/drm/drm_agpsupport.c
+++ b/drivers/gpu/drm/drm_agpsupport.c
@@ -464,7 +464,8 @@ DRM_AGP_MEM *
drm_agp_bind_pages(struct drm_device *dev,
struct page **pages,
unsigned long num_pages,
- uint32_t gtt_offset)
+ uint32_t gtt_offset,
+ u32 type)
{
DRM_AGP_MEM *mem;
int ret, i;
@@ -472,7 +473,7 @@ drm_agp_bind_pages(struct drm_device *dev,
DRM_DEBUG("\n");
mem = drm_agp_allocate_memory(dev->agp->bridge, num_pages,
- AGP_USER_MEMORY);
+ type);
if (mem == NULL) {
DRM_ERROR("Failed to allocate memory for %ld pages\n",
num_pages);
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