diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2017-09-20 17:19:58 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 15:14:33 -0400 |
| commit | 37192704d9f55b0a64248c91a251fc6665f88045 (patch) | |
| tree | 522ee0292292bb5e46b9d3d7603c462519e280d2 /drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | |
| parent | a9eca3a685b9fc3c9910eca4783ef07a2345b9e0 (diff) | |
| download | op-kernel-dev-37192704d9f55b0a64248c91a251fc6665f88045.zip op-kernel-dev-37192704d9f55b0a64248c91a251fc6665f88045.tar.gz | |
drm/amd/powerplay: delete SMUM_WRITE_VFPF_INDIRECT_FIELD
repeated defining in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c index 6a9b3cf..7ffcada 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c @@ -42,7 +42,7 @@ static int tonga_start_in_protection_mode(struct pp_hwmgr *hwmgr) int result; /* Assert reset */ - SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, + PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 1); result = smu7_upload_smu_firmware_image(hwmgr); @@ -54,15 +54,15 @@ static int tonga_start_in_protection_mode(struct pp_hwmgr *hwmgr) ixSMU_STATUS, 0); /* Enable clock */ - SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, + PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); /* De-assert reset */ - SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, + PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0); /* Set SMU Auto Start */ - SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, + PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_INPUT_DATA, AUTO_START, 1); /* Clear firmware interrupt enable flag */ @@ -109,7 +109,7 @@ static int tonga_start_in_non_protection_mode(struct pp_hwmgr *hwmgr) ixFIRMWARE_FLAGS, 0); - SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, + PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 1); result = smu7_upload_smu_firmware_image(hwmgr); @@ -121,11 +121,11 @@ static int tonga_start_in_non_protection_mode(struct pp_hwmgr *hwmgr) smu7_program_jump_on_start(hwmgr); - SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, + PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0); /*De-assert reset*/ - SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, + PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0); /* Wait for firmware to initialize */ |
