diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2016-10-12 08:22:25 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2016-10-12 08:22:25 +0200 |
commit | c0c8b9ed1b0c14d91ff73624df6d918bb47c8a5e (patch) | |
tree | 7fb6f2c7c028cd4926b827d3b5937c49afefa63a /drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | |
parent | 5a920b85f2c6e3fd7d9dd9bb3f3345e9085e2360 (diff) | |
parent | 69405d3da98b48633b78a49403e4f9cdb7c6a0f5 (diff) | |
download | op-kernel-dev-c0c8b9ed1b0c14d91ff73624df6d918bb47c8a5e.zip op-kernel-dev-c0c8b9ed1b0c14d91ff73624df6d918bb47c8a5e.tar.gz |
Merge tag 'drm-for-v4.9' into drm-intel-next-queued
It's been over two months, git definitely lost it's marbles. Conflicts
resolved by picking our version, plus manually checking the diff with
the parent in drm-intel-next-queued to make sure git didn't do
anything stupid. It did, so I removed 2 occasions where it
double-inserted a bit of code. The diff is now just
- kernel-doc changes
- drm format/name changes
- display-info changes
so looks all reasonable.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | 110 |
1 files changed, 104 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c index 7723473..e5812aa 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c @@ -28,10 +28,7 @@ #include "smumgr.h" #include "cgs_common.h" #include "linux/delay.h" -#include "cz_smumgr.h" -#include "tonga_smumgr.h" -#include "fiji_smumgr.h" -#include "polaris10_smumgr.h" + int smum_init(struct amd_pp_init *pp_init, struct pp_instance *handle) { @@ -47,7 +44,6 @@ int smum_init(struct amd_pp_init *pp_init, struct pp_instance *handle) smumgr->device = pp_init->device; smumgr->chip_family = pp_init->chip_family; smumgr->chip_id = pp_init->chip_id; - smumgr->hw_revision = pp_init->rev_id; smumgr->usec_timeout = AMD_MAX_USEC_TIMEOUT; smumgr->reload_fw = 1; handle->smu_mgr = smumgr; @@ -58,6 +54,9 @@ int smum_init(struct amd_pp_init *pp_init, struct pp_instance *handle) break; case AMDGPU_FAMILY_VI: switch (smumgr->chip_id) { + case CHIP_TOPAZ: + iceland_smum_init(smumgr); + break; case CHIP_TONGA: tonga_smum_init(smumgr); break; @@ -87,6 +86,57 @@ int smum_fini(struct pp_smumgr *smumgr) return 0; } +int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr, + void *input, void *output, void *storage, int result) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->thermal_avfs_enable) + return hwmgr->smumgr->smumgr_funcs->thermal_avfs_enable(hwmgr); + + return 0; +} + +int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr, + void *input, void *output, void *storage, int result) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->thermal_setup_fan_table) + return hwmgr->smumgr->smumgr_funcs->thermal_setup_fan_table(hwmgr); + + return 0; +} + +int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr) +{ + + if (NULL != hwmgr->smumgr->smumgr_funcs->update_sclk_threshold) + return hwmgr->smumgr->smumgr_funcs->update_sclk_threshold(hwmgr); + + return 0; +} + +int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) +{ + + if (NULL != hwmgr->smumgr->smumgr_funcs->update_smc_table) + return hwmgr->smumgr->smumgr_funcs->update_smc_table(hwmgr, type); + + return 0; +} + +uint32_t smum_get_offsetof(struct pp_smumgr *smumgr, uint32_t type, uint32_t member) +{ + if (NULL != smumgr->smumgr_funcs->get_offsetof) + return smumgr->smumgr_funcs->get_offsetof(type, member); + + return 0; +} + +int smum_process_firmware_header(struct pp_hwmgr *hwmgr) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->process_firmware_header) + return hwmgr->smumgr->smumgr_funcs->process_firmware_header(hwmgr); + return 0; +} + int smum_get_argument(struct pp_smumgr *smumgr) { if (NULL != smumgr->smumgr_funcs->get_argument) @@ -95,13 +145,20 @@ int smum_get_argument(struct pp_smumgr *smumgr) return 0; } +uint32_t smum_get_mac_definition(struct pp_smumgr *smumgr, uint32_t value) +{ + if (NULL != smumgr->smumgr_funcs->get_mac_definition) + return smumgr->smumgr_funcs->get_mac_definition(value); + + return 0; +} + int smum_download_powerplay_table(struct pp_smumgr *smumgr, void **table) { if (NULL != smumgr->smumgr_funcs->download_pptable_settings) return smumgr->smumgr_funcs->download_pptable_settings(smumgr, table); - return 0; } @@ -268,3 +325,44 @@ int smu_free_memory(void *device, void *handle) return 0; } + +int smum_init_smc_table(struct pp_hwmgr *hwmgr) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->init_smc_table) + return hwmgr->smumgr->smumgr_funcs->init_smc_table(hwmgr); + + return 0; +} + +int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->populate_all_graphic_levels) + return hwmgr->smumgr->smumgr_funcs->populate_all_graphic_levels(hwmgr); + + return 0; +} + +int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->populate_all_memory_levels) + return hwmgr->smumgr->smumgr_funcs->populate_all_memory_levels(hwmgr); + + return 0; +} + +/*this interface is needed by island ci/vi */ +int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->initialize_mc_reg_table) + return hwmgr->smumgr->smumgr_funcs->initialize_mc_reg_table(hwmgr); + + return 0; +} + +bool smum_is_dpm_running(struct pp_hwmgr *hwmgr) +{ + if (NULL != hwmgr->smumgr->smumgr_funcs->is_dpm_running) + return hwmgr->smumgr->smumgr_funcs->is_dpm_running(hwmgr); + + return true; +} |