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| author | Eric Huang <JinHuiEric.Huang@amd.com> | 2018-02-22 12:00:35 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-02-26 23:09:36 -0500 |
| commit | 472c89fcd5c2505c7d5d785ea3a78b2e71ff8723 (patch) | |
| tree | a40360b1dae54ccc8e7fa37c29c7b05cecb4717f /drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | |
| parent | eda9a4eb15e89e4d452ae8dbdc7fd6868c79c605 (diff) | |
| download | op-kernel-dev-472c89fcd5c2505c7d5d785ea3a78b2e71ff8723.zip op-kernel-dev-472c89fcd5c2505c7d5d785ea3a78b2e71ff8723.tar.gz | |
drm/amd/powerplay: fix thermal interrupts on vega10
a bug in programming thermal interrupt register masks out
interrupts and driver cannot receive interrupts. Setting
0 to mask bits will fix it.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c index 7491163..eb6e965 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c @@ -409,7 +409,9 @@ static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1); val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)); val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)); - val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK); + val &= (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK) & + (~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK) & + (~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK); cgs_write_register(hwmgr->device, reg, val); |
