diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2018-03-16 16:56:58 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-03-19 13:38:31 -0500 |
| commit | 2538090cb62ab85d8e685bf79c31cc15f41f2629 (patch) | |
| tree | ee63fc5dd6c3bd811edfdaca417d9d2fa6cd5555 /drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | |
| parent | c7d30b40a240d6433eb016990632c11e3e7dcc36 (diff) | |
| download | op-kernel-dev-2538090cb62ab85d8e685bf79c31cc15f41f2629.zip op-kernel-dev-2538090cb62ab85d8e685bf79c31cc15f41f2629.tar.gz | |
drm/amd/pp: Delete get_xclk function in powerplay (v2)
use asic's callback function get_xclk in amdgpu
v2: squash in removal of leftover debug info
(drm/amd/pp: Delete debug info in smu7_hwmgr.c) (Rex)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c index 0147267..444337a 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c @@ -110,7 +110,7 @@ int vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed) if (tach_period == 0) return -EINVAL; - crystal_clock_freq = smu7_get_xclk(hwmgr); + crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); *speed = 60 * crystal_clock_freq * 10000 / tach_period; } @@ -331,7 +331,7 @@ int vega10_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) result = vega10_fan_ctrl_stop_smc_fan_control(hwmgr); if (!result) { - crystal_clock_freq = smu7_get_xclk(hwmgr); + crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed); reg = soc15_get_register_offset(THM_HWID, 0, mmCG_TACH_STATUS_BASE_IDX, mmCG_TACH_STATUS); |
