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| author | Dave Airlie <airlied@redhat.com> | 2017-02-24 08:35:23 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2017-02-24 08:35:23 +1000 |
| commit | 1e8ad3d8da4763b238d09244d4d1177aa640c0d3 (patch) | |
| tree | 726ad9e44d1ae8bd550c983b58b7697ef1c67c66 /drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | |
| parent | 894ebc414d4688da732a185954ca23c5d11900d0 (diff) | |
| parent | 187368a5c7ad6c41159b85025a87d6d136eb8d4b (diff) | |
| download | op-kernel-dev-1e8ad3d8da4763b238d09244d4d1177aa640c0d3.zip op-kernel-dev-1e8ad3d8da4763b238d09244d4d1177aa640c0d3.tar.gz | |
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
Some ttm/amd fixes.
* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux:
drm/amd/powerplay: fix PSI feature on Polars12.
drm/amdgpu: refuse to reserve io mem for split VRAM buffers
drm/ttm: fix use-after-free races in vm fault handling
drm/amd/amdgpu: post card if there is real hw resetting performed
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index b1de9e8..f75ee33 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -1383,6 +1383,15 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) data->force_pcie_gen = PP_PCIEGenInvalid; data->ulv_supported = hwmgr->feature_mask & PP_ULV_MASK ? true : false; + if (hwmgr->chip_id == CHIP_POLARIS12 || hwmgr->smumgr->is_kicker) { + uint8_t tmp1, tmp2; + uint16_t tmp3 = 0; + atomctrl_get_svi2_info(hwmgr, VOLTAGE_TYPE_VDDC, &tmp1, &tmp2, + &tmp3); + tmp3 = (tmp3 >> 5) & 0x3; + data->vddc_phase_shed_control = ((tmp3 << 1) | (tmp3 >> 1)) & 0x3; + } + data->fast_watermark_threshold = 100; if (atomctrl_is_voltage_controled_by_gpio_v3(hwmgr, VOLTAGE_TYPE_VDDC, VOLTAGE_OBJ_SVID2)) |
