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| author | Mikita Lipski <mikita.lipski@amd.com> | 2018-04-10 13:45:00 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-15 13:43:20 -0500 |
| commit | 03a27de648d8a2b2bf59a7f467855fac2d850350 (patch) | |
| tree | b9bcf909a219c0208098a08cd645a4a00654ae49 /drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h | |
| parent | 361883649221f975d915e4bc79907da71017f38f (diff) | |
| download | op-kernel-dev-03a27de648d8a2b2bf59a7f467855fac2d850350.zip op-kernel-dev-03a27de648d8a2b2bf59a7f467855fac2d850350.tar.gz | |
drm/amd/pp: Adding set_watermarks_for_clocks_ranges for SMU10
The function is never implemented for raven on linux.
It follows similair implementation as on windows.
SMU still needs to notify SMC and copy WM table, which is added
here. But on other Asics such as Vega this step is not implemented.
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h index 175c3a5..f68b218 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h @@ -290,6 +290,7 @@ struct smu10_hwmgr { bool vcn_dpg_mode; bool gfx_off_controled_by_driver; + bool water_marks_exist; Watermarks_t water_marks_table; struct smu10_clock_voltage_information clock_vol_info; DpmClocks_t clock_table; |
