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author | yanyang1 <young.yang@amd.com> | 2015-08-17 14:15:20 +0800 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2015-12-21 16:42:12 -0500 |
commit | 3a287055aed6634d57d57da1977f1df3c9206945 (patch) | |
tree | b1c0c1299351902a4567db2ed0b731e5cef4dfe9 /drivers/gpu/drm/amd/include | |
parent | 577bbe01832285f6f5128ae570246e086e37f9d0 (diff) | |
download | op-kernel-dev-3a287055aed6634d57d57da1977f1df3c9206945.zip op-kernel-dev-3a287055aed6634d57d57da1977f1df3c9206945.tar.gz |
drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h
Add ixSWRST_COMMAND_1 in bif_5_0_d.h. Required by
new powerplay code for tonga and fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h index 92b6ba0..2933297 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h +++ b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h @@ -596,6 +596,7 @@ #define mmSWRST_EP_CONTROL_0 0x14ac #define mmCPM_CONTROL 0x14b8 #define mmGSKT_CONTROL 0x14bf +#define ixSWRST_COMMAND_1 0x1400103 #define ixLM_CONTROL 0x1400120 #define ixLM_PCIETXMUX0 0x1400121 #define ixLM_PCIETXMUX1 0x1400122 |