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authorAlex Deucher <alexander.deucher@amd.com>2018-05-10 15:15:12 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-05-23 23:51:22 -0500
commite1d1a7729a62d7b79fb2ab4ac3bc6fc0ebfb6db9 (patch)
tree34f8a729f74846b2f42445eab2ce64204f1bd83f /drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
parent1ca2393b7373d5b0e5a356124fb10fc97e143e88 (diff)
downloadop-kernel-dev-e1d1a7729a62d7b79fb2ab4ac3bc6fc0ebfb6db9.zip
op-kernel-dev-e1d1a7729a62d7b79fb2ab4ac3bc6fc0ebfb6db9.tar.gz
drm/amdgpu/gmc9: disable partial wr rmw if ECC is not enabled
The vbios mistakenly sets this bit on some boards without ECC. This can lead to reduced performance in some workloads. Disable the bit if the board does not have ECC. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index b60ed28..3c0a85d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -675,6 +675,7 @@ static int gmc_v9_0_late_init(void *handle)
DRM_INFO("ECC is active.\n");
} else if (r == 0) {
DRM_INFO("ECC is not present.\n");
+ adev->df_funcs->enable_ecc_force_par_wr_rmw(adev, false);
} else {
DRM_ERROR("gmc_v9_0_ecc_available() failed. r: %d\n", r);
return r;
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