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authorTom St Denis <tom.stdenis@amd.com>2018-02-26 09:09:26 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-02-26 23:09:47 -0500
commit585b7f161c85bd5ca675b97580faf21c506541e3 (patch)
treedb671c25b34215de2d07c963db7d3b96ceea410a /drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
parent45a9d154f61519b64c95bf27ef341e0b50931998 (diff)
downloadop-kernel-dev-585b7f161c85bd5ca675b97580faf21c506541e3.zip
op-kernel-dev-585b7f161c85bd5ca675b97580faf21c506541e3.tar.gz
drm/amd/amdgpu: Correct VRAM width for APUs with GMC9
DDR4 has a 64-bit width not 128-bits. It was reporting twice the width. Tested with my Ryzen 2400G. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index bc4bd5e..4dd4691 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -722,7 +722,10 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
if (!adev->gmc.vram_width) {
/* hbm memory channel size */
- chansize = 128;
+ if (adev->flags & AMD_IS_APU)
+ chansize = 64;
+ else
+ chansize = 128;
tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK;
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