diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2017-07-24 22:58:36 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-07-25 16:37:16 -0400 |
| commit | 96d78e3734da237e008de4cef85d3406dfffe500 (patch) | |
| tree | 8f374bfa74b9cce8f55e6cd624462d8e0ff0e92d /drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | |
| parent | 03ba88cfdc671354c5c81ac717b51def6b46a1cc (diff) | |
| download | op-kernel-dev-96d78e3734da237e008de4cef85d3406dfffe500.zip op-kernel-dev-96d78e3734da237e008de4cef85d3406dfffe500.tar.gz | |
drm/amdgpu/gmc7: disable legacy vga features in gmc init
Needs to be done when the MC is set up.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c index 21a45b4..4a9e840 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c @@ -37,6 +37,9 @@ #include "oss/oss_2_0_d.h" #include "oss/oss_2_0_sh_mask.h" +#include "dce/dce_8_0_d.h" +#include "dce/dce_8_0_sh_mask.h" + #include "amdgpu_atombios.h" static void gmc_v7_0_set_gart_funcs(struct amdgpu_device *adev); @@ -273,6 +276,17 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) if (gmc_v7_0_wait_for_idle((void *)adev)) { dev_warn(adev->dev, "Wait for MC idle timedout !\n"); } + if (adev->mode_info.num_crtc) { + /* Lockout access through VGA aperture*/ + tmp = RREG32(mmVGA_HDP_CONTROL); + tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); + WREG32(mmVGA_HDP_CONTROL, tmp); + + /* disable VGA render */ + tmp = RREG32(mmVGA_RENDER_CONTROL); + tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); + WREG32(mmVGA_RENDER_CONTROL, tmp); + } /* Update configuration */ WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, adev->mc.vram_start >> 12); |
