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| author | Evan Quan <evan.quan@amd.com> | 2018-07-04 17:06:38 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-13 14:44:38 -0500 |
| commit | d26031c113acf8289d118bae9a8a293b2f9f6a34 (patch) | |
| tree | ff806656b80bb54df11e966d67e3a9d859074712 /drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | |
| parent | b58b65cf7ac09b3d9a979a6a9bbe41abfc425a2a (diff) | |
| download | op-kernel-dev-d26031c113acf8289d118bae9a8a293b2f9f6a34.zip op-kernel-dev-d26031c113acf8289d118bae9a8a293b2f9f6a34.tar.gz | |
drm/amdgpu: drop mmRLC_PG_CNTL clear v2
SMU owns this register so the driver should not set it
to avoid breaking gfxoff.
v2: update description
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 5e92002..6439e65 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -2293,9 +2293,6 @@ static int gfx_v9_0_rlc_resume(struct amdgpu_device *adev) /* disable CG */ WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0); - /* disable PG */ - WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, 0); - gfx_v9_0_rlc_reset(adev); gfx_v9_0_init_pg(adev); |
