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| author | Christian König <christian.koenig@amd.com> | 2018-04-17 14:47:42 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-15 13:43:31 -0500 |
| commit | 58cd8fbc64b03d0e9961d627526bd07edbea00b9 (patch) | |
| tree | 2c4dacfbd9f388e9dd5b47a3da39e74014160b4b /drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | |
| parent | b5b4ea4d98b42f94442e5d46d5942f392ed8af56 (diff) | |
| download | op-kernel-dev-58cd8fbc64b03d0e9961d627526bd07edbea00b9.zip op-kernel-dev-58cd8fbc64b03d0e9961d627526bd07edbea00b9.tar.gz | |
drm/amdgpu: limit reg_write_reg_wait workaround to SRIOV v2
Turned out that this locks up some bare metal Vega10.
v2: fix stupid typo
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 583f6f6..6a19e03 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -4144,7 +4144,12 @@ static void gfx_v9_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, { int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX); - gfx_v9_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, ref, mask, 0x20); + if (amdgpu_sriov_vf(ring->adev)) + gfx_v9_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, + ref, mask, 0x20); + else + amdgpu_ring_emit_reg_write_reg_wait_helper(ring, reg0, reg1, + ref, mask); } static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, |
