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authorHuang Rui <ray.huang@amd.com>2018-06-01 14:41:04 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-06-13 13:45:21 -0500
commit06b18f61ee78f8c69417c3a5e4f21ed678662315 (patch)
tree03798c38b14c361d3f2bf2c9d8cbef50fc23bd5f /drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
parent387f49e5467244b7bcb4cad0946a5d0fcade5f92 (diff)
downloadop-kernel-dev-06b18f61ee78f8c69417c3a5e4f21ed678662315.zip
op-kernel-dev-06b18f61ee78f8c69417c3a5e4f21ed678662315.tar.gz
drm/amdgpu: fix CG enabling hang with gfxoff enabled
After defer the execution of clockgating enabling, at that time, gfx already enter into "off" state. Howerver, clockgating enabling will use MMIO to access the gfx registers, then get the gfx hung. So here we should move the gfx powergating and gfxoff enabling behavior at the end of initialization behind clockgating. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Cc: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 4f7a72d..95f2773 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3405,11 +3405,6 @@ static int gfx_v9_0_late_init(void *handle)
if (r)
return r;
- r = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_GFX,
- AMD_PG_STATE_GATE);
- if (r)
- return r;
-
return 0;
}
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