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authorYong Zhao <Yong.Zhao@amd.com>2017-07-27 12:48:22 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-08-15 14:45:58 -0400
commit51ac7eec620b8ec705955ad2c845a5b5fed6b40f (patch)
treedb1de1243647e0e728a331f0e38b12da9a6223f8 /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
parent2046d46db9166bddc84778f0b3477f6d1e9068ea (diff)
downloadop-kernel-dev-51ac7eec620b8ec705955ad2c845a5b5fed6b40f.zip
op-kernel-dev-51ac7eec620b8ec705955ad2c845a5b5fed6b40f.tar.gz
drm/amdgpu: Support IOMMU on Raven
We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for PDEs and setting S bit to 1 for PTEs when the corresponding addresses are not occupied by gpu driver allocated buffers. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 34d9174..217ecba 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -146,6 +146,9 @@ struct amdgpu_vm {
/* Flag to indicate if VM tables are updated by CPU or GPU (SDMA) */
bool use_cpu_for_update;
+
+ /* Flag to indicate ATS support from PTE for GFX9 */
+ bool pte_support_ats;
};
struct amdgpu_vm_id {
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