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| author | Xiangliang Yu <Xiangliang.Yu@amd.com> | 2017-01-12 14:53:08 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-01-27 11:13:23 -0500 |
| commit | 1e9f1392795e63f20d109b2ee6d44a7ffc99b7ab (patch) | |
| tree | a45daaa4d53242ae4ce759d3a0e9c806074dae7d /drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | |
| parent | bc992ba5a3c19c79873fab46f17dcb20a9b84a85 (diff) | |
| download | op-kernel-dev-1e9f1392795e63f20d109b2ee6d44a7ffc99b7ab.zip op-kernel-dev-1e9f1392795e63f20d109b2ee6d44a7ffc99b7ab.tar.gz | |
drm/amdgpu/virt: add high level interfaces for virt
Add high level interfaces that is not relate to specific asic. So
asic files just need to implement the interfaces to support
virtualization.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h index 433f559..d460544 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h @@ -30,13 +30,23 @@ #define AMDGPU_PASSTHROUGH_MODE (1 << 3) /* thw whole GPU is pass through for VM */ #define AMDGPU_SRIOV_CAPS_RUNTIME (1 << 4) /* is out of full access mode */ +/** + * struct amdgpu_virt_ops - amdgpu device virt operations + */ +struct amdgpu_virt_ops { + int (*req_full_gpu)(struct amdgpu_device *adev, bool init); + int (*rel_full_gpu)(struct amdgpu_device *adev, bool init); + int (*reset_gpu)(struct amdgpu_device *adev); +}; + /* GPU virtualization */ struct amdgpu_virt { - uint32_t caps; - struct amdgpu_bo *csa_obj; - uint64_t csa_vmid0_addr; - uint32_t reg_val_offs; - struct mutex lock; + uint32_t caps; + struct amdgpu_bo *csa_obj; + uint64_t csa_vmid0_addr; + uint32_t reg_val_offs; + struct mutex lock; + const struct amdgpu_virt_ops *ops; }; #define AMDGPU_CSA_SIZE (8 * 1024) @@ -72,5 +82,8 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm); void amdgpu_virt_init_setting(struct amdgpu_device *adev); uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); +int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init); +int amdgpu_virt_release_full_gpu(struct amdgpu_device *adev, bool init); +int amdgpu_virt_reset_gpu(struct amdgpu_device *adev); #endif |
