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authorDave Airlie <airlied@redhat.com>2015-08-20 09:40:49 +1000
committerDave Airlie <airlied@redhat.com>2015-08-20 09:40:49 +1000
commite2a8986f3e287dc036ce1b9452d7b9e2d8839f2b (patch)
tree3459b59ade856c84a50539a894edc237bf7636da /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
parent294947a5c7f6d228b70fcc51a89527e74a38a2c5 (diff)
parent05906dec7d7daf197b9b773295c95ad6b9af2a5a (diff)
downloadop-kernel-dev-e2a8986f3e287dc036ce1b9452d7b9e2d8839f2b.zip
op-kernel-dev-e2a8986f3e287dc036ce1b9452d7b9e2d8839f2b.tar.gz
Merge branch 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux into drm-next
amdgpu and radeon changes for 4.3. Highlights: - Fiji support for amdgpu. - CGS support for amdgpu. This is a new driver internal cross-component API. - Initial GPU scheduler for amdgpu. Still disabled by default. - Lots of bug fixes and optimizations * 'drm-next-4.3' of git://people.freedesktop.org/~agd5f/linux: (130 commits) drm/amdgpu: wait on page directory changes. v2 drm/amdgpu: Select BACKLIGHT_LCD_SUPPORT drm/radeon: Select BACKLIGHT_LCD_SUPPORT drm/amdgpu: cleanup sheduler rq handling v2 drm/amdgpu: move prepare work out of scheduler to cs_ioctl drm/amdgpu: fix unnecessary wake up drm/amdgpu: fix duplicated mapping invoke bug drm/amdgpu: drop bo_list_clone when no scheduler drm/amdgpu: disable GPU reset by default drm/amdgpu: fix type mismatch error drm/amdgpu: add reference for **fence drm/amdgpu: fix waiting for all fences before flipping drm/amdgpu: fix UVD return code checking drm/amdgpu: remove scheduler fence list v2 drm/amdgpu: remove amd_sched_wait_emit v2 drm/amdgpu: remove unecessary scheduler fence callbacks drm/amdgpu: fix scheduler fence implementation drm/amdgpu: don't grab dev->struct_mutex in pm functions drm/amdgpu: Don't take dev->struct_mutex in bo_force_delete drm/radeon: Don't take dev->struct_mutex in pm functions ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.c24
1 files changed, 5 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 8da6424..57adcad 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -223,18 +223,6 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
size_t acc_size;
int r;
- /* VI has a hw bug where VM PTEs have to be allocated in groups of 8.
- * do this as a temporary workaround
- */
- if (!(domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA))) {
- if (adev->asic_type >= CHIP_TOPAZ) {
- if (byte_align & 0x7fff)
- byte_align = ALIGN(byte_align, 0x8000);
- if (size & 0x7fff)
- size = ALIGN(size, 0x8000);
- }
- }
-
page_align = roundup(byte_align, PAGE_SIZE) >> PAGE_SHIFT;
size = ALIGN(size, PAGE_SIZE);
@@ -462,7 +450,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
int amdgpu_bo_evict_vram(struct amdgpu_device *adev)
{
/* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
- if (0 && (adev->flags & AMDGPU_IS_APU)) {
+ if (0 && (adev->flags & AMD_IS_APU)) {
/* Useless to evict on IGP chips */
return 0;
}
@@ -478,7 +466,6 @@ void amdgpu_bo_force_delete(struct amdgpu_device *adev)
}
dev_err(adev->dev, "Userspace still has active objects !\n");
list_for_each_entry_safe(bo, n, &adev->gem.objects, list) {
- mutex_lock(&adev->ddev->struct_mutex);
dev_err(adev->dev, "%p %p %lu %lu force free\n",
&bo->gem_base, bo, (unsigned long)bo->gem_base.size,
*((unsigned long *)&bo->gem_base.refcount));
@@ -486,8 +473,7 @@ void amdgpu_bo_force_delete(struct amdgpu_device *adev)
list_del_init(&bo->list);
mutex_unlock(&bo->adev->gem.mutex);
/* this should unref the ttm bo */
- drm_gem_object_unreference(&bo->gem_base);
- mutex_unlock(&adev->ddev->struct_mutex);
+ drm_gem_object_unreference_unlocked(&bo->gem_base);
}
}
@@ -658,13 +644,13 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
* @shared: true if fence should be added shared
*
*/
-void amdgpu_bo_fence(struct amdgpu_bo *bo, struct amdgpu_fence *fence,
+void amdgpu_bo_fence(struct amdgpu_bo *bo, struct fence *fence,
bool shared)
{
struct reservation_object *resv = bo->tbo.resv;
if (shared)
- reservation_object_add_shared_fence(resv, &fence->base);
+ reservation_object_add_shared_fence(resv, fence);
else
- reservation_object_add_excl_fence(resv, &fence->base);
+ reservation_object_add_excl_fence(resv, fence);
}
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