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authorRob Clark <robdclark@gmail.com>2013-06-26 12:44:06 -0400
committerRob Clark <robdclark@gmail.com>2013-08-24 14:57:07 -0400
commitc8afe684c95cd17cf4f273d81af369a0fdfa5a74 (patch)
tree2dd1c87eb2541d4666f3199637f2ca8cd5a49a62 /drivers/gpu/drm/Makefile
parent0cf6c71d70d8aa39b8fd0e39c9009602a0e0d300 (diff)
downloadop-kernel-dev-c8afe684c95cd17cf4f273d81af369a0fdfa5a74.zip
op-kernel-dev-c8afe684c95cd17cf4f273d81af369a0fdfa5a74.tar.gz
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers, depending on which chip variant/version. (As far as I can tell, current devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And then external to the display controller are HDMI, DSI, etc. blocks which may be shared across devices which have different display controller blocks. To more easily add support for different display controller blocks, the display controller specific bits are split out into a "kms" module, which provides the kms plane/crtc/encoder objects. The external HDMI, DSI, etc. blocks are part encoder, and part connector currently. But I think I will pull in the drm_bridge patches from chromeos tree, and split them into a bridge+connector, with the registers that need to be set in modeset handled by the bridge. This would remove the 'msm_connector' base class. But some things need to be double checked to make sure I could get the correct ON/OFF sequencing.. This patch adds support for mdp4 crtc (including hw cursor), dtv encoder (part of MDP4 block), and hdmi. Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/Makefile')
-rw-r--r--drivers/gpu/drm/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 7b2343a..f089adf 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -54,4 +54,5 @@ obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
obj-$(CONFIG_DRM_OMAP) += omapdrm/
obj-$(CONFIG_DRM_TILCDC) += tilcdc/
obj-$(CONFIG_DRM_QXL) += qxl/
+obj-$(CONFIG_DRM_MSM) += msm/
obj-y += i2c/
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