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author | Hien Dang <hien.dang.eb@renesas.com> | 2018-02-05 04:15:02 +0900 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2018-02-22 15:50:20 +0100 |
commit | 51750fb167a054684a18c20e0e78f7f65b12c985 (patch) | |
tree | 1c2d9b5b29661a834f53d71b0afff3f61928846b /drivers/gpio | |
parent | 62c16234bbfd2758ec2fdd1a716d13418c58044d (diff) | |
download | op-kernel-dev-51750fb167a054684a18c20e0e78f7f65b12c985.zip op-kernel-dev-51750fb167a054684a18c20e0e78f7f65b12c985.tar.gz |
gpio: gpio-rcar: Support S2RAM
This patch adds an implementation that saves and restores the state of
GPIO configuration on suspend and resume.
Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Modify structure of the bank info to simplify a saving registers]
[Remove DEV_PM_OPS macro]
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Tested-by: Nguyen Viet Dung <dung.nguyen.aj@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r-- | drivers/gpio/gpio-rcar.c | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index e76de57..e5b0dbe 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -31,6 +31,16 @@ #include <linux/spinlock.h> #include <linux/slab.h> +struct gpio_rcar_bank_info { + u32 iointsel; + u32 inoutsel; + u32 outdt; + u32 posneg; + u32 edglevel; + u32 bothedge; + u32 intmsk; +}; + struct gpio_rcar_priv { void __iomem *base; spinlock_t lock; @@ -41,6 +51,7 @@ struct gpio_rcar_priv { unsigned int irq_parent; bool has_both_edge_trigger; bool needs_clk; + struct gpio_rcar_bank_info bank_info; }; #define IOINTSEL 0x00 /* General IO/Interrupt Switching Register */ @@ -531,11 +542,66 @@ static int gpio_rcar_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_SLEEP +static int gpio_rcar_suspend(struct device *dev) +{ + struct gpio_rcar_priv *p = dev_get_drvdata(dev); + + p->bank_info.iointsel = gpio_rcar_read(p, IOINTSEL); + p->bank_info.inoutsel = gpio_rcar_read(p, INOUTSEL); + p->bank_info.outdt = gpio_rcar_read(p, OUTDT); + p->bank_info.intmsk = gpio_rcar_read(p, INTMSK); + p->bank_info.posneg = gpio_rcar_read(p, POSNEG); + p->bank_info.edglevel = gpio_rcar_read(p, EDGLEVEL); + if (p->has_both_edge_trigger) + p->bank_info.bothedge = gpio_rcar_read(p, BOTHEDGE); + + return 0; +} + +static int gpio_rcar_resume(struct device *dev) +{ + struct gpio_rcar_priv *p = dev_get_drvdata(dev); + unsigned int offset; + u32 mask; + + for (offset = 0; offset < p->gpio_chip.ngpio; offset++) { + mask = BIT(offset); + /* I/O pin */ + if (!(p->bank_info.iointsel & mask)) { + if (p->bank_info.inoutsel & mask) + gpio_rcar_direction_output( + &p->gpio_chip, offset, + !!(p->bank_info.outdt & mask)); + else + gpio_rcar_direction_input(&p->gpio_chip, + offset); + } else { + /* Interrupt pin */ + gpio_rcar_config_interrupt_input_mode( + p, + offset, + !(p->bank_info.posneg & mask), + !(p->bank_info.edglevel & mask), + !!(p->bank_info.bothedge & mask)); + + if (p->bank_info.intmsk & mask) + gpio_rcar_write(p, MSKCLR, mask); + } + } + + return 0; +} +#endif /* CONFIG_PM_SLEEP*/ + +static SIMPLE_DEV_PM_OPS(gpio_rcar_pm_ops, gpio_rcar_suspend, gpio_rcar_resume); + static struct platform_driver gpio_rcar_device_driver = { .probe = gpio_rcar_probe, .remove = gpio_rcar_remove, .driver = { .name = "gpio_rcar", + .pm = &gpio_rcar_pm_ops, .of_match_table = of_match_ptr(gpio_rcar_of_table), } }; |