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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-10 14:20:10 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-10 14:20:10 -0800
commitc9f861c77269bc9950c16c6404a9476062241671 (patch)
tree5f1fd6cf839eab1fa11b4fd03b5db1e65e2a0cd5 /drivers/edac
parenta023748d53c10850650fe86b1c4a7d421d576451 (diff)
parentc7c9b3929b6a57ad47ab4021c77e46f7ff21c007 (diff)
downloadop-kernel-dev-c9f861c77269bc9950c16c6404a9476062241671.zip
op-kernel-dev-c9f861c77269bc9950c16c6404a9476062241671.tar.gz
Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 RAS update from Ingo Molnar: "The biggest change in this cycle is better support for UCNA (UnCorrected No Action) events: "Handle all uncorrected error reports in the same way (soft offline the page). We used to only do that for SRAO (software recoverable action optional) machine checks, but it makes sense to also do it for UCNA (UnCorrected No Action) logs found by CMCI or polling." plus various x86 MCE handling updates and fixes" * 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce: Spell "panicked" correctly x86, mce: Support memory error recovery for both UCNA and Deferred error in machine_check_poll x86, mce, severity: Extend the the mce_severity mechanism to handle UCNA/DEFERRED error x86, MCE, AMD: Assign interrupt handler only when bank supports it x86, MCE, AMD: Drop software-defined bank in error thresholding x86, MCE, AMD: Move invariant code out from loop body x86, MCE, AMD: Correct thresholding error logging x86, MCE, AMD: Use macros to compute bank MSRs RAS, HWPOISON: Fix wrong error recovery status GHES: Make ghes_estatus_caches static APEI, GHES: Cleanup unnecessary function for lockless list
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/mce_amd.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/edac/mce_amd.h b/drivers/edac/mce_amd.h
index 51b7e3a..c2359a1 100644
--- a/drivers/edac/mce_amd.h
+++ b/drivers/edac/mce_amd.h
@@ -32,9 +32,6 @@
#define R4(x) (((x) >> 4) & 0xf)
#define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
-#define MCI_STATUS_DEFERRED BIT_64(44)
-#define MCI_STATUS_POISON BIT_64(43)
-
extern const char * const pp_msgs[];
enum tt_ids {
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