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authorBorislav Petkov <borislav.petkov@amd.com>2010-12-22 19:48:20 +0100
committerBorislav Petkov <borislav.petkov@amd.com>2011-03-17 14:46:15 +0100
commitc9f4f26eae096c39547139666e8af607c2447f94 (patch)
tree754fabb84aea79bac1d8a05e3017d4df52ac817b /drivers/edac
parent78da121e1560805a0e6e11952de30b416accef62 (diff)
downloadop-kernel-dev-c9f4f26eae096c39547139666e8af607c2447f94.zip
op-kernel-dev-c9f4f26eae096c39547139666e8af607c2447f94.tar.gz
amd64_edac: Cleanup NBCTL code
Remove family names from macro names, drop single bit defines and comment their meaning instead. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/amd64_edac.c14
-rw-r--r--drivers/edac/amd64_edac.h8
2 files changed, 8 insertions, 14 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 495b4d5..9a8a313 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2196,21 +2196,20 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
struct pci_dev *F3)
{
bool ret = true;
- u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
+ u32 value, mask = 0x3; /* UECC/CECC enable */
if (toggle_ecc_err_reporting(s, nid, ON)) {
amd64_warn("Error enabling ECC reporting over MCGCTL!\n");
return false;
}
- amd64_read_pci_cfg(F3, K8_NBCTL, &value);
+ amd64_read_pci_cfg(F3, NBCTL, &value);
- /* turn on UECCEn and CECCEn bits */
s->old_nbctl = value & mask;
s->nbctl_valid = true;
value |= mask;
- amd64_write_pci_cfg(F3, K8_NBCTL, value);
+ amd64_write_pci_cfg(F3, NBCTL, value);
amd64_read_pci_cfg(F3, K8_NBCFG, &value);
@@ -2250,16 +2249,17 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
static void restore_ecc_error_reporting(struct ecc_settings *s, u8 nid,
struct pci_dev *F3)
{
- u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
+ u32 value, mask = 0x3; /* UECC/CECC enable */
+
if (!s->nbctl_valid)
return;
- amd64_read_pci_cfg(F3, K8_NBCTL, &value);
+ amd64_read_pci_cfg(F3, NBCTL, &value);
value &= ~mask;
value |= s->old_nbctl;
- amd64_write_pci_cfg(F3, K8_NBCTL, value);
+ amd64_write_pci_cfg(F3, NBCTL, value);
/* restore previous BIOS DRAM ECC "off" setting we force-enabled */
if (!s->flags.nb_ecc_prev) {
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 0244c61..fc609d1 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -244,13 +244,7 @@
/*
* Function 3 - Misc Control
*/
-#define K8_NBCTL 0x40
-
-/* Correctable ECC error reporting enable */
-#define K8_NBCTL_CECCEn BIT(0)
-
-/* UnCorrectable ECC error reporting enable */
-#define K8_NBCTL_UECCEn BIT(1)
+#define NBCTL 0x40
#define K8_NBCFG 0x44
#define K8_NBCFG_CHIPKILL BIT(23)
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