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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-03-31 17:11:39 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-04 09:31:35 -0500 |
| commit | a94d7b35067ab403485a1ea06b7a3d0172d1a1ba (patch) | |
| tree | 7571c9548f46742f8cf22fbad1a14ea6c86601bd /drivers/edac | |
| parent | d2f989262ee713b9a8a9a1baedc2445ed958d986 (diff) | |
| download | op-kernel-dev-a94d7b35067ab403485a1ea06b7a3d0172d1a1ba.zip op-kernel-dev-a94d7b35067ab403485a1ea06b7a3d0172d1a1ba.tar.gz | |
edac/mpc85xx: Limit setting/clearing of HID1[RFXE] to e500v1/v2 cores
Only the e500v1/v2 cores have HID1[RXFE] so we should attempt to set or
clear this register bit on them. Otherwise we get crashes like:
NIP: c0579f84 LR: c006d550 CTR: c0579f84
REGS: ef857ec0 TRAP: 0700 Not tainted (2.6.38.2-00072-gf15ba3c)
MSR: 00021002 <ME,CE> CR: 22044022 XER: 00000000
TASK = ef8559c0[1] 'swapper' THREAD: ef856000 CPU: 0
GPR00: c006d538 ef857f70 ef8559c0 00000000 00000004 00000000 00000000 00000000
GPR08: c0590000 c30170a8 00000000 c30170a8 00000001 0fffe000 00000000 00000000
GPR16: 00000000 7ffa0e60 00000000 00000000 7ffb0bd8 7ff3b844 c05be000 00000000
GPR24: 00000000 00000000 c05c28b0 c0579fac 00000000 00029002 00000000 c0579f84
NIP [c0579f84] mpc85xx_mc_clear_rfxe+0x0/0x28
LR [c006d550] on_each_cpu+0x34/0x50
Call Trace:
[ef857f70] [c006d538] on_each_cpu+0x1c/0x50 (unreliable)
[ef857f90] [c057a070] mpc85xx_mc_init+0xc4/0xdc
[ef857fa0] [c0001cd4] do_one_initcall+0x34/0x1a8
[ef857fd0] [c055d9d8] kernel_init+0x17c/0x218
[ef857ff0] [c000cda4] kernel_thread+0x4c/0x68
Instruction dump:
40be0018 3c60c052 3863c70c 4be9baad 3be0ffed 4bd7c99d 80010014 7fe3fb78
83e1000c 38210010 7c0803a6 4e800020 <7c11faa6> 54290024 81290008
3d60c06e
Oops: Exception in kernel mode, sig: 4 [#2]
---[ end trace 49ff3b8f93efde1a ]---
Also use the HID1_RFXE define rather than a magic number.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/mpc85xx_edac.c | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index ffb5ad0..38ab8e2 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -1147,13 +1147,14 @@ static struct platform_driver mpc85xx_mc_err_driver = { static void __init mpc85xx_mc_clear_rfxe(void *data) { orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); - mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000)); + mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~HID1_RFXE)); } #endif static int __init mpc85xx_mc_init(void) { int res = 0; + u32 pvr = 0; printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, " "(C) 2006 Montavista Software\n"); @@ -1183,12 +1184,17 @@ static int __init mpc85xx_mc_init(void) #endif #ifdef CONFIG_FSL_SOC_BOOKE - /* - * need to clear HID1[RFXE] to disable machine check int - * so we can catch it - */ - if (edac_op_state == EDAC_OPSTATE_INT) - on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); + pvr = mfspr(SPRN_PVR); + + if ((PVR_VER(pvr) == PVR_VER_E500V1) || + (PVR_VER(pvr) == PVR_VER_E500V2)) { + /* + * need to clear HID1[RFXE] to disable machine check int + * so we can catch it + */ + if (edac_op_state == EDAC_OPSTATE_INT) + on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); + } #endif return 0; @@ -1206,7 +1212,12 @@ static void __exit mpc85xx_mc_restore_hid1(void *data) static void __exit mpc85xx_mc_exit(void) { #ifdef CONFIG_FSL_SOC_BOOKE - on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); + u32 pvr = mfspr(SPRN_PVR); + + if ((PVR_VER(pvr) == PVR_VER_E500V1) || + (PVR_VER(pvr) == PVR_VER_E500V2)) { + on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); + } #endif #ifdef CONFIG_PCI platform_driver_unregister(&mpc85xx_pci_err_driver); |
