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| author | Peter Tyser <ptyser@xes-inc.com> | 2010-03-10 15:23:11 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 15:52:40 -0800 |
| commit | 21768639be419d00275ac4e58b863361d0c24ee4 (patch) | |
| tree | 845cff5c080d41e41cd8a7c0f455348bbcd590fa /drivers/edac/mpc85xx_edac.h | |
| parent | 8467005da3ef6104b89a4cc5e9c9d9445b75565f (diff) | |
| download | op-kernel-dev-21768639be419d00275ac4e58b863361d0c24ee4.zip op-kernel-dev-21768639be419d00275ac4e58b863361d0c24ee4.tar.gz | |
edac: mpc85xx mask ecc syndrome correctly
With a 64-bit wide data bus only the lowest 8-bits of the ECC syndrome are
relevant. With a 32-bit wide data bus only the lowest 16-bits are
relevant on most architectures.
Without this change, the ECC syndrome displayed can be mildly confusing,
eg:
EDAC MPC85xx MC1: syndrome: 0x25252525
When in reality the ECC syndrome is 0x25.
A variety of Freescale manuals say a variety of different things about how
to decode the CAPTURE_ECC (syndrome) register. I don't have a system with
a 32-bit bus to test on, but I believe the change is correct. It'd be
good to get an ACK from someone at Freescale about this change though.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Cc: Kumar Gala <galak@gate.crashing.org>
Cc: Dave Jiang <djiang@mvista.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/edac/mpc85xx_edac.h')
| -rw-r--r-- | drivers/edac/mpc85xx_edac.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h index 52432ee..cb24df8 100644 --- a/drivers/edac/mpc85xx_edac.h +++ b/drivers/edac/mpc85xx_edac.h @@ -48,6 +48,9 @@ #define DSC_MEM_EN 0x80000000 #define DSC_ECC_EN 0x20000000 #define DSC_RD_EN 0x10000000 +#define DSC_DBW_MASK 0x00180000 +#define DSC_DBW_32 0x00080000 +#define DSC_DBW_64 0x00000000 #define DSC_SDTYPE_MASK 0x07000000 |
