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authorBorislav Petkov <borislav.petkov@amd.com>2011-01-07 16:17:46 +0100
committerBorislav Petkov <borislav.petkov@amd.com>2011-03-17 14:46:17 +0100
commitbcd781f46a5f892ef2ae5843839849aa579fe096 (patch)
tree7498d7d5096a61042d9f72444001f8b31e765b25 /drivers/edac/mce_amd.c
parenta97fa68ec403e2761a37b28651de8fd9da8c5e1f (diff)
downloadop-kernel-dev-bcd781f46a5f892ef2ae5843839849aa579fe096.zip
op-kernel-dev-bcd781f46a5f892ef2ae5843839849aa579fe096.tar.gz
amd64_edac: Cleanup NBSH cruft
Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/mce_amd.c')
-rw-r--r--drivers/edac/mce_amd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index f6cf73d..1afca60 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -604,7 +604,7 @@ void amd_decode_nb_mce(int node_id, struct mce *m, u32 nbcfg)
/* F10h, revD can disable ErrCpu[3:0] through ErrCpuVal */
if ((boot_cpu_data.x86 == 0x10) &&
(boot_cpu_data.x86_model > 7)) {
- if (nbsh & K8_NBSH_ERR_CPU_VAL)
+ if (nbsh & NBSH_ERR_CPU_VAL)
core = nbsh & nb_err_cpumask;
} else {
u8 assoc_cpus = nbsh & nb_err_cpumask;
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