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authorBorislav Petkov <borislav.petkov@amd.com>2010-09-06 15:05:45 +0200
committerBorislav Petkov <bp@amd64.org>2010-10-21 14:48:03 +0200
commit9530d608ef0e1f76b7fd82bb92645062292fc009 (patch)
treeaaa1e8365c5ffd2525b52d924d2af8411ecc4376 /drivers/edac/mce_amd.c
parentfe4ea2623bec3e595f8e77a8514307c389c096ae (diff)
downloadop-kernel-dev-9530d608ef0e1f76b7fd82bb92645062292fc009.zip
op-kernel-dev-9530d608ef0e1f76b7fd82bb92645062292fc009.tar.gz
EDAC, MCE: Enable MCE decoding on F14h
Now that all decoders have been taught about F14h, models < 0x10 MCEs, enable decoding on this family of CPUs. Also, issue a short informational message upon boot that MCE decoding gets enabled. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/mce_amd.c')
-rw-r--r--drivers/edac/mce_amd.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 83b7b5f..f233c5f 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -598,13 +598,12 @@ static struct notifier_block amd_mce_dec_nb = {
static int __init mce_amd_init(void)
{
- /*
- * We can decode MCEs for K8, F10h and F11h CPUs:
- */
if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
return 0;
- if (boot_cpu_data.x86 < 0xf || boot_cpu_data.x86 > 0x11)
+ if (boot_cpu_data.x86 != 0xf &&
+ boot_cpu_data.x86 != 0x10 &&
+ (boot_cpu_data.x86 != 0x14 || boot_cpu_data.x86_model > 0xf))
return 0;
fam_ops = kzalloc(sizeof(struct amd_decoder_ops), GFP_KERNEL);
@@ -638,6 +637,8 @@ static int __init mce_amd_init(void)
return -EINVAL;
}
+ pr_info("MCE: In-kernel MCE decoding enabled.\n");
+
atomic_notifier_chain_register(&x86_mce_decoder_chain, &amd_mce_dec_nb);
return 0;
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