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authorMauro Carvalho Chehab <mchehab@redhat.com>2010-08-27 11:20:38 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-08-30 14:56:58 -0300
commit28c2ce7c8b275a8e6950bacb2dbad70b36a2996b (patch)
treeca4941376076fd7245894285e5c74b287f32b691 /drivers/edac/i7300_edac.c
parent3b330f67581db4f5301438cc0d9499f13314542d (diff)
downloadop-kernel-dev-28c2ce7c8b275a8e6950bacb2dbad70b36a2996b.zip
op-kernel-dev-28c2ce7c8b275a8e6950bacb2dbad70b36a2996b.tar.gz
i7300_edac: Fix MTR x4/x8 detection logic
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/i7300_edac.c')
-rw-r--r--drivers/edac/i7300_edac.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
index 218d463..a4f47fd 100644
--- a/drivers/edac/i7300_edac.c
+++ b/drivers/edac/i7300_edac.c
@@ -583,14 +583,14 @@ static int decode_mtr(struct i7300_pvt *pvt,
debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
} else {
debugf2("\t\tECC code is on Lockstep mode\n");
- if (MTR_DRAM_WIDTH(mtr))
+ if (MTR_DRAM_WIDTH(mtr) == 8)
p_csrow->edac_mode = EDAC_S8ECD8ED;
else
p_csrow->edac_mode = EDAC_S4ECD4ED;
}
/* ask what device type on this row */
- if (MTR_DRAM_WIDTH(mtr)) {
+ if (MTR_DRAM_WIDTH(mtr) == 8) {
debugf2("\t\tScrub algorithm for x8 is on %s mode\n",
IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
"enhanced" : "normal");
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