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author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-03-28 19:37:59 -0300 |
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committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-06-11 13:23:44 -0300 |
commit | fd63312dfe70b8279618b4d77dc951b6e309ffa2 (patch) | |
tree | a6a4012398f8977d7059d3dd6e85c120c4fc50fd /drivers/edac/cpc925_edac.c | |
parent | 452a6bf955ee1842361742833e40e046287308f4 (diff) | |
download | op-kernel-dev-fd63312dfe70b8279618b4d77dc951b6e309ffa2.zip op-kernel-dev-fd63312dfe70b8279618b4d77dc951b6e309ffa2.tar.gz |
edac: Move grain/dtype/edac_type calculus to be out of channel loop
The 3e7bddc changeset (edac: move dimm properties to struct memset_info)
moved the calculus inside a loop. However, at those stuff are common to
all channels, on several drivers, it is better to put the calculus
outside the loop, to optimize the code.
Reported-by: Aristeu Rozanski Filho <arozansk@redhat.com>
Reviewed-by: Aristeu Rozanski <arozansk@redhat.com>
Cc: Mark Gross <mark.gross@intel.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Michal Marek <mmarek@suse.cz>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/cpc925_edac.c')
-rw-r--r-- | drivers/edac/cpc925_edac.c | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index 9488723..3510aa4 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -330,8 +330,9 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) struct cpc925_mc_pdata *pdata = mci->pvt_info; struct csrow_info *csrow; struct dimm_info *dimm; + enum dev_type dtype; int index, j; - u32 mbmr, mbbar, bba; + u32 mbmr, mbbar, bba, grain; unsigned long row_size, nr_pages, last_nr_pages = 0; get_total_mem(pdata); @@ -355,37 +356,36 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) csrow->last_page = csrow->first_page + nr_pages - 1; last_nr_pages = csrow->last_page + 1; + switch (csrow->nr_channels) { + case 1: /* Single channel */ + grain = 32; /* four-beat burst of 32 bytes */ + break; + case 2: /* Dual channel */ + default: + grain = 64; /* four-beat burst of 64 bytes */ + break; + } + switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) { + case 6: /* 0110, no way to differentiate X8 VS X16 */ + case 5: /* 0101 */ + case 8: /* 1000 */ + dtype = DEV_X16; + break; + case 7: /* 0111 */ + case 9: /* 1001 */ + dtype = DEV_X8; + break; + default: + dtype = DEV_UNKNOWN; + break; + } for (j = 0; j < csrow->nr_channels; j++) { dimm = csrow->channels[j].dimm; - dimm->nr_pages = nr_pages / csrow->nr_channels; dimm->mtype = MEM_RDDR; dimm->edac_mode = EDAC_SECDED; - - switch (csrow->nr_channels) { - case 1: /* Single channel */ - dimm->grain = 32; /* four-beat burst of 32 bytes */ - break; - case 2: /* Dual channel */ - default: - dimm->grain = 64; /* four-beat burst of 64 bytes */ - break; - } - - switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) { - case 6: /* 0110, no way to differentiate X8 VS X16 */ - case 5: /* 0101 */ - case 8: /* 1000 */ - dimm->dtype = DEV_X16; - break; - case 7: /* 0111 */ - case 9: /* 1001 */ - dimm->dtype = DEV_X8; - break; - default: - dimm->dtype = DEV_UNKNOWN; - break; - } + dimm->grain = grain; + dimm->dtype = dtype; } } } |