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authorBorislav Petkov <borislav.petkov@amd.com>2011-03-21 20:45:06 +0100
committerBorislav Petkov <borislav.petkov@amd.com>2011-04-26 16:18:44 +0200
commitf08e457cecece7fbbdad3add9defac3373a59b5a (patch)
tree10fc4421d4277cb24ec2019ce4965f5a3dcf02a1 /drivers/edac/amd64_edac.h
parentf030ddfb3752df36bb73285353374fc04feabb80 (diff)
downloadop-kernel-dev-f08e457cecece7fbbdad3add9defac3373a59b5a.zip
op-kernel-dev-f08e457cecece7fbbdad3add9defac3373a59b5a.tar.gz
amd64_edac: Factor in CC6 save area
F15h and later use a portion of DRAM as a CC6 storage area. BIOS programs D18F1x[17C:140,7C:40] DRAM Base/Limit accordingly by subtracting the storage area from the DRAM limit setting. However, in order for edac to consider that part of DRAM too, we need to include it into the per-node range. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/amd64_edac.h')
-rw-r--r--drivers/edac/amd64_edac.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 11be36a..0110930 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -196,6 +196,8 @@
#define DCT_CFG_SEL 0x10C
+#define DRAM_LOCAL_NODE_LIM 0x124
+
#define DRAM_BASE_HI 0x140
#define DRAM_LIMIT_HI 0x144
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