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author | Tony Lindgren <tony@atomide.com> | 2011-11-07 12:27:23 -0800 |
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committer | Tony Lindgren <tony@atomide.com> | 2011-11-07 12:27:23 -0800 |
commit | d30cc16c8e48368e0518f4975a78711e53e14a0f (patch) | |
tree | 26b57f7ab5a963cc3d6c57dff6951bd930875583 /drivers/edac/Kconfig | |
parent | 41eb2d813f558900884e240c2f723e36c7bd151f (diff) | |
parent | a1bcc1dcef8451b4291ea2a1b2677cb194102952 (diff) | |
download | op-kernel-dev-d30cc16c8e48368e0518f4975a78711e53e14a0f.zip op-kernel-dev-d30cc16c8e48368e0518f4975a78711e53e14a0f.tar.gz |
Merge branch 'fixes-modulesplit' into fixes
Diffstat (limited to 'drivers/edac/Kconfig')
-rw-r--r-- | drivers/edac/Kconfig | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index af1a17d..5948a21 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -41,7 +41,7 @@ config EDAC_DEBUG config EDAC_DECODE_MCE tristate "Decode MCEs in human-readable form (only on AMD for now)" - depends on CPU_SUP_AMD && X86_MCE + depends on CPU_SUP_AMD && X86_MCE_AMD default y ---help--- Enable this option if you want to decode Machine Check Exceptions @@ -71,9 +71,6 @@ config EDAC_MM_EDAC occurred so that a particular failing memory module can be replaced. If unsure, select 'Y'. -config EDAC_MCE - bool - config EDAC_AMD64 tristate "AMD64 (Opteron, Athlon64) K8, F10h" depends on EDAC_MM_EDAC && AMD_NB && X86_64 && EDAC_DECODE_MCE @@ -173,8 +170,7 @@ config EDAC_I5400 config EDAC_I7CORE tristate "Intel i7 Core (Nehalem) processors" - depends on EDAC_MM_EDAC && PCI && X86 - select EDAC_MCE + depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL help Support for error detection and correction the Intel i7 Core (Nehalem) Integrated Memory Controller that exists on @@ -216,6 +212,14 @@ config EDAC_I7300 Support for error detection and correction the Intel Clarksboro MCH (Intel 7300 chipset). +config EDAC_SBRIDGE + tristate "Intel Sandy-Bridge Integrated MC" + depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL + depends on EXPERIMENTAL + help + Support for error detection and correction the Intel + Sandy Bridge Integrated Memory Controller. + config EDAC_MPC85XX tristate "Freescale MPC83xx / MPC85xx" depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx) |