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| author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-06-22 22:41:15 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-05-10 11:44:45 -0300 |
| commit | a0c36a1f0fbab42590dab3c13c10fa7d20e6c2cd (patch) | |
| tree | 1aba0a7bd6f50cf394e747d02c624f456a24fdb8 /drivers/edac/Kconfig | |
| parent | 66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8 (diff) | |
| download | op-kernel-dev-a0c36a1f0fbab42590dab3c13c10fa7d20e6c2cd.zip op-kernel-dev-a0c36a1f0fbab42590dab3c13c10fa7d20e6c2cd.tar.gz | |
i7core_edac: Add an EDAC memory controller driver for Nehalem chipsets
This driver is meant to support i7 core/i7core extreme desktop
processors and Xeon 35xx/55xx series with integrated memory controller.
It is likely that it can be expanded in the future to work with other
processor series based at the same Memory Controller design.
For now, it has just a few MCH status reads.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/Kconfig')
| -rw-r--r-- | drivers/edac/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 55c9c59..391ddbf 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -166,6 +166,13 @@ config EDAC_I5400 Support for error detection and correction the Intel i5400 MCH chipset (Seaburg). +config EDAC_I7CORE + tristate "Intel i7 Core (Nehalem) processors" + depends on EDAC_MM_EDAC && PCI && X86 + help + Support for error detection and correction the Intel + i7 Core (Nehalem) Integrated Memory Controller + config EDAC_I82860 tristate "Intel 82860" depends on EDAC_MM_EDAC && PCI && X86_32 |
