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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-27 19:04:36 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-27 19:04:36 -0700 |
| commit | e3e1288e86a07cdeb0aee5860a2dff111c6eff79 (patch) | |
| tree | cd22f8051a456c9d2b95698b6fe402776a67469b /drivers/dma/dmaengine.c | |
| parent | 9ae6d039224def926656206725ae6e89d1331417 (diff) | |
| parent | 964dc256bb91e990277010a3f6dc66daa130be8b (diff) | |
| download | op-kernel-dev-e3e1288e86a07cdeb0aee5860a2dff111c6eff79.zip op-kernel-dev-e3e1288e86a07cdeb0aee5860a2dff111c6eff79.tar.gz | |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits)
DMAENGINE: move COH901318 to arch_initcall
dma: imx-dma: fix signedness bug
dma/timberdale: simplify conditional
ste_dma40: remove channel_type
ste_dma40: remove enum for endianess
ste_dma40: remove TIM_FOR_LINK option
ste_dma40: move mode_opt to separate config
ste_dma40: move channel mode to a separate field
ste_dma40: move priority to separate field
ste_dma40: add variable to indicate valid dma_cfg
async_tx: make async_tx channel switching opt-in
move async raid6 test to lib/Kconfig.debug
dmaengine: Add Freescale i.MX1/21/27 DMA driver
intel_mid_dma: change the slave interface
intel_mid_dma: fix the WARN_ONs
intel_mid_dma: Add sg list support to DMA driver
intel_mid_dma: Allow DMAC2 to share interrupt
intel_mid_dma: Allow IRQ sharing
intel_mid_dma: Add runtime PM support
DMAENGINE: define a dummy filter function for ste_dma40
...
Diffstat (limited to 'drivers/dma/dmaengine.c')
| -rw-r--r-- | drivers/dma/dmaengine.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index 9d31d5e..8bcb15f 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -690,8 +690,12 @@ int dma_async_device_register(struct dma_device *device) !device->device_prep_dma_memset); BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt); + BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) && + !device->device_prep_dma_sg); BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) && !device->device_prep_slave_sg); + BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) && + !device->device_prep_dma_cyclic); BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) && !device->device_control); @@ -702,7 +706,7 @@ int dma_async_device_register(struct dma_device *device) BUG_ON(!device->dev); /* note: this only matters in the - * CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH=y case + * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case */ if (device_has_all_tx_types(device)) dma_cap_set(DMA_ASYNC_TX, device->cap_mask); @@ -976,7 +980,7 @@ void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, struct dma_chan *chan) { tx->chan = chan; - #ifndef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH + #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH spin_lock_init(&tx->lock); #endif } |
