diff options
author | Tadeusz Struk <tadeusz.struk@intel.com> | 2014-06-24 15:19:34 -0700 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2014-06-26 14:49:43 +0800 |
commit | d65071ecde1ed1b99d057a877e0e3d29748c3a4d (patch) | |
tree | 33a73e418a5ab0fc86b3109a2bc4217d7eded32a /drivers/crypto | |
parent | 83530d818f63b737694226fa7af7ae13b6e6c76b (diff) | |
download | op-kernel-dev-d65071ecde1ed1b99d057a877e0e3d29748c3a4d.zip op-kernel-dev-d65071ecde1ed1b99d057a877e0e3d29748c3a4d.tar.gz |
crypto: qat - Fixed new checkpatch warnings
After updates to checkpatch new warnings pops up this patch fixes them.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Acked-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_aer.c | 1 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_cfg.c | 3 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_transport.c | 2 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_transport_debug.c | 3 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_algs.c | 4 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_crypto.c | 4 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_hal.c | 7 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_uclo.c | 17 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_dh895xcc/adf_hw_arbiter.c | 12 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_dh895xcc/adf_isr.c | 2 |
10 files changed, 37 insertions, 18 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_aer.c b/drivers/crypto/qat/qat_common/adf_aer.c index 0651678..c29d4c3 100644 --- a/drivers/crypto/qat/qat_common/adf_aer.c +++ b/drivers/crypto/qat/qat_common/adf_aer.c @@ -95,6 +95,7 @@ static void adf_dev_restore(struct adf_accel_dev *accel_dev) pending = ppdstat & PCI_EXP_DEVSTA_TRPND; if (pending) { int ctr = 0; + do { msleep(100); pci_read_config_word(pdev, PPDSTAT_OFFSET, &ppdstat); diff --git a/drivers/crypto/qat/qat_common/adf_cfg.c b/drivers/crypto/qat/qat_common/adf_cfg.c index 389c0cf..4279076 100644 --- a/drivers/crypto/qat/qat_common/adf_cfg.c +++ b/drivers/crypto/qat/qat_common/adf_cfg.c @@ -57,6 +57,7 @@ static DEFINE_MUTEX(qat_cfg_read_lock); static void *qat_dev_cfg_start(struct seq_file *sfile, loff_t *pos) { struct adf_cfg_device_data *dev_cfg = sfile->private; + mutex_lock(&qat_cfg_read_lock); return seq_list_start(&dev_cfg->sec_list, *pos); } @@ -79,6 +80,7 @@ static int qat_dev_cfg_show(struct seq_file *sfile, void *v) static void *qat_dev_cfg_next(struct seq_file *sfile, void *v, loff_t *pos) { struct adf_cfg_device_data *dev_cfg = sfile->private; + return seq_list_next(v, &dev_cfg->sec_list, pos); } @@ -100,6 +102,7 @@ static int qat_dev_cfg_open(struct inode *inode, struct file *file) if (!ret) { struct seq_file *seq_f = file->private_data; + seq_f->private = inode->i_private; } return ret; diff --git a/drivers/crypto/qat/qat_common/adf_transport.c b/drivers/crypto/qat/qat_common/adf_transport.c index b213010..5f3fa45 100644 --- a/drivers/crypto/qat/qat_common/adf_transport.c +++ b/drivers/crypto/qat/qat_common/adf_transport.c @@ -55,6 +55,7 @@ static inline uint32_t adf_modulo(uint32_t data, uint32_t shift) { uint32_t div = data >> shift; uint32_t mult = div << shift; + return data - mult; } @@ -68,6 +69,7 @@ static inline int adf_check_ring_alignment(uint64_t addr, uint64_t size) static int adf_verify_ring_size(uint32_t msg_size, uint32_t msg_num) { int i = ADF_MIN_RING_SIZE; + for (; i <= ADF_MAX_RING_SIZE; i++) if ((msg_size * msg_num) == ADF_SIZE_TO_RING_SIZE_IN_BYTES(i)) return i; diff --git a/drivers/crypto/qat/qat_common/adf_transport_debug.c b/drivers/crypto/qat/qat_common/adf_transport_debug.c index d83a581..6b69745 100644 --- a/drivers/crypto/qat/qat_common/adf_transport_debug.c +++ b/drivers/crypto/qat/qat_common/adf_transport_debug.c @@ -57,6 +57,7 @@ static DEFINE_MUTEX(bank_read_lock); static void *adf_ring_start(struct seq_file *sfile, loff_t *pos) { struct adf_etr_ring_data *ring = sfile->private; + mutex_lock(&ring_read_lock); if (*pos == 0) return SEQ_START_TOKEN; @@ -143,6 +144,7 @@ static int adf_ring_open(struct inode *inode, struct file *file) if (!ret) { struct seq_file *seq_f = file->private_data; + seq_f->private = inode->i_private; } return ret; @@ -258,6 +260,7 @@ static int adf_bank_open(struct inode *inode, struct file *file) if (!ret) { struct seq_file *seq_f = file->private_data; + seq_f->private = inode->i_private; } return ret; diff --git a/drivers/crypto/qat/qat_common/qat_algs.c b/drivers/crypto/qat/qat_common/qat_algs.c index c4e8010..946686f 100644 --- a/drivers/crypto/qat/qat_common/qat_algs.c +++ b/drivers/crypto/qat/qat_common/qat_algs.c @@ -610,6 +610,7 @@ static void qat_alg_free_bufl(struct qat_crypto_instance *inst, if (blp != blpout) { /* If out of place operation dma unmap only data */ int bufless = bufs - blout->num_mapped_bufs; + for (i = bufless; i < bufs; i++) { dma_unmap_single(dev, blout->bufers[i].addr, blout->bufers[i].len, @@ -667,6 +668,7 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst, for_each_sg(sgl, sg, n, i) { int y = i + bufs; + bufl->bufers[y].addr = dma_map_single(dev, sg_virt(sg), sg->length, DMA_BIDIRECTIONAL); @@ -698,6 +700,7 @@ static int qat_alg_sgl_to_bufl(struct qat_crypto_instance *inst, } for_each_sg(sglout, sg, n, i) { int y = i + bufs; + bufers[y].addr = dma_map_single(dev, sg_virt(sg), sg->length, DMA_BIDIRECTIONAL); @@ -729,6 +732,7 @@ err: if (sgl != sglout && buflout) { for_each_sg(sglout, sg, n, i) { int y = i + bufs; + if (!dma_mapping_error(dev, buflout->bufers[y].addr)) dma_unmap_single(dev, buflout->bufers[y].addr, buflout->bufers[y].len, diff --git a/drivers/crypto/qat/qat_common/qat_crypto.c b/drivers/crypto/qat/qat_common/qat_crypto.c index cc562cb..0d59bcb 100644 --- a/drivers/crypto/qat/qat_common/qat_crypto.c +++ b/drivers/crypto/qat/qat_common/qat_crypto.c @@ -146,8 +146,8 @@ struct qat_crypto_instance *qat_crypto_get_instance_node(int node) static int qat_crypto_create_instances(struct adf_accel_dev *accel_dev) { int i; - long unsigned int bank; - long unsigned int num_inst, num_msg_sym, num_msg_asym; + unsigned long bank; + unsigned long num_inst, num_msg_sym, num_msg_asym; int msg_size; struct qat_crypto_instance *inst; char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES]; diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c index 260cd71..903ca88 100644 --- a/drivers/crypto/qat/qat_common/qat_hal.c +++ b/drivers/crypto/qat/qat_common/qat_hal.c @@ -266,6 +266,7 @@ static unsigned short qat_hal_get_reg_addr(unsigned int type, unsigned short reg_num) { unsigned short reg_addr; + switch (type) { case ICP_GPA_ABS: case ICP_GPB_ABS: @@ -816,6 +817,7 @@ void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr); for (i = 0; i < words_num; i++) { unsigned int uwrd_lo, uwrd_hi, tmp; + uwrd_lo = ((data[i] & 0xfff0000) << 4) | (0x3 << 18) | ((data[i] & 0xff00) << 2) | (0x3 << 8) | (data[i] & 0xff); @@ -888,6 +890,7 @@ static int qat_hal_exec_micro_inst(struct icp_qat_fw_loader_handle *handle, return -EFAULT; if (endpc) { unsigned int ctx_status; + qat_hal_rd_indr_csr(handle, ae, ctx, CTX_STS_INDIRECT, &ctx_status); *endpc = ctx_status & handle->hal_handle->upc_mask; @@ -1111,8 +1114,8 @@ int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, alloc_inst_size = lm_init_header->size; if ((unsigned int)alloc_inst_size > handle->hal_handle->max_ustore) alloc_inst_size = handle->hal_handle->max_ustore; - micro_inst_arry = kmalloc(alloc_inst_size * sizeof(uint64_t), - GFP_KERNEL); + micro_inst_arry = kmalloc_array(alloc_inst_size, sizeof(uint64_t), + GFP_KERNEL); if (!micro_inst_arry) return -ENOMEM; micro_inst_num = 0; diff --git a/drivers/crypto/qat/qat_common/qat_uclo.c b/drivers/crypto/qat/qat_common/qat_uclo.c index a698d07e..20b6b42 100644 --- a/drivers/crypto/qat/qat_common/qat_uclo.c +++ b/drivers/crypto/qat/qat_common/qat_uclo.c @@ -171,7 +171,6 @@ static void qat_uclo_wr_umem_by_words(struct icp_qat_fw_loader_handle *handle, num_in_bytes -= 4; ptr += 4; } - return; } static void qat_uclo_batch_wr_umem(struct icp_qat_fw_loader_handle *handle, @@ -186,6 +185,7 @@ static void qat_uclo_batch_wr_umem(struct icp_qat_fw_loader_handle *handle, umem_init = umem_init_header->next; while (umem_init) { unsigned int addr, *value, size; + ae = umem_init->ae; addr = umem_init->addr; value = umem_init->value; @@ -204,6 +204,7 @@ qat_uclo_cleanup_batch_init_list(struct icp_qat_fw_loader_handle *handle, umem_init = *base; while (umem_init) { struct icp_qat_uof_batch_init *pre; + pre = umem_init; umem_init = umem_init->next; kfree(pre); @@ -414,7 +415,7 @@ static int qat_uclo_init_ustore(struct icp_qat_fw_loader_handle *handle, uint64_t *fill_data; uof_image = image->img_ptr; - fill_data = kzalloc(ICP_QAT_UCLO_MAX_USTORE * sizeof(uint64_t), + fill_data = kcalloc(ICP_QAT_UCLO_MAX_USTORE, sizeof(uint64_t), GFP_KERNEL); if (!fill_data) return -EFAULT; @@ -720,6 +721,7 @@ qat_uclo_map_str_table(struct icp_qat_uclo_objhdr *obj_hdr, obj_hdr->file_buff, tab_name, NULL); if (chunk_hdr) { int hdr_size; + memcpy(&str_table->table_len, obj_hdr->file_buff + chunk_hdr->offset, sizeof(str_table->table_len)); hdr_size = (char *)&str_table->strings - (char *)str_table; @@ -821,6 +823,7 @@ static int qat_uclo_init_reg_sym(struct icp_qat_fw_loader_handle *handle, for (i = 0; i < encap_ae->init_regsym_num; i++) { unsigned int exp_res; + init_regsym = &encap_ae->init_regsym[i]; exp_res = init_regsym->value; switch (init_regsym->init_type) { @@ -949,7 +952,7 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle) struct icp_qat_uclo_objhandle *obj_handle = handle->obj_handle; unsigned int ae; - obj_handle->uword_buf = kzalloc(UWORD_CPYBUF_SIZE * sizeof(uint64_t), + obj_handle->uword_buf = kcalloc(UWORD_CPYBUF_SIZE, sizeof(uint64_t), GFP_KERNEL); if (!obj_handle->uword_buf) return -ENOMEM; @@ -957,20 +960,20 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle) obj_handle->encap_uof_obj.obj_hdr = (struct icp_qat_uof_objhdr *) obj_handle->obj_hdr->file_buff; obj_handle->encap_uof_obj.chunk_hdr = (struct icp_qat_uof_chunkhdr *) - obj_handle->obj_hdr->file_buff + sizeof(struct icp_qat_uof_objhdr); + (obj_handle->obj_hdr->file_buff + sizeof(struct icp_qat_uof_objhdr)); obj_handle->uword_in_bytes = 6; obj_handle->prod_type = ICP_QAT_AC_C_CPU_TYPE; obj_handle->prod_rev = PID_MAJOR_REV | (PID_MINOR_REV & handle->hal_handle->revision_id); if (qat_uclo_check_uof_compat(obj_handle)) { - pr_err("QAT: uof incompatible\n "); + pr_err("QAT: uof incompatible\n"); return -EINVAL; } obj_handle->ustore_phy_size = ICP_QAT_UCLO_MAX_USTORE; if (!(obj_handle->obj_hdr->file_buff) || !(qat_uclo_map_str_table(obj_handle->obj_hdr, ICP_QAT_UOF_STRT, &(obj_handle->str_table)))) { - pr_err("QAT: uof doesn't have effective images"); + pr_err("QAT: uof doesn't have effective images\n"); goto out_err; } obj_handle->uimage_num = @@ -979,7 +982,7 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle) if (!obj_handle->uimage_num) goto out_err; if (qat_uclo_map_ae(handle, handle->hal_handle->ae_max_num)) { - pr_err("QAT: Bad object\n "); + pr_err("QAT: Bad object\n"); goto out_check_uof_aemask_err; } qat_uclo_init_uword_num(handle); diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_hw_arbiter.c b/drivers/crypto/qat/qat_dh895xcc/adf_hw_arbiter.c index 36ffa70..1864bdb 100644 --- a/drivers/crypto/qat/qat_dh895xcc/adf_hw_arbiter.c +++ b/drivers/crypto/qat/qat_dh895xcc/adf_hw_arbiter.c @@ -63,29 +63,29 @@ #define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \ ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \ - (ADF_ARB_REG_SLOT * index), value); + (ADF_ARB_REG_SLOT * index), value) #define WRITE_CSR_ARB_RESPORDERING(csr_addr, index, value) \ ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ - ADF_ARB_RO_EN_OFFSET) + (ADF_ARB_REG_SIZE * index), value); + ADF_ARB_RO_EN_OFFSET) + (ADF_ARB_REG_SIZE * index), value) #define WRITE_CSR_ARB_WEIGHT(csr_addr, arb, index, value) \ ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ ADF_ARB_WTR_OFFSET) + (ADF_ARB_WTR_SIZE * arb) + \ - (ADF_ARB_REG_SIZE * index), value); + (ADF_ARB_REG_SIZE * index), value) #define WRITE_CSR_ARB_SARCONFIG(csr_addr, index, value) \ ADF_CSR_WR(csr_addr, ADF_ARB_OFFSET + \ - (ADF_ARB_REG_SIZE * index), value); + (ADF_ARB_REG_SIZE * index), value) #define WRITE_CSR_ARB_WRK_2_SER_MAP(csr_addr, index, value) \ ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ ADF_ARB_WRK_2_SER_MAP_OFFSET) + \ - (ADF_ARB_REG_SIZE * index), value); + (ADF_ARB_REG_SIZE * index), value) #define WRITE_CSR_ARB_WQCFG(csr_addr, index, value) \ ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ - ADF_ARB_WQCFG_OFFSET) + (ADF_ARB_REG_SIZE * index), value); + ADF_ARB_WQCFG_OFFSET) + (ADF_ARB_REG_SIZE * index), value) int adf_init_arb(struct adf_accel_dev *accel_dev) { diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_isr.c b/drivers/crypto/qat/qat_dh895xcc/adf_isr.c index 77e2d3a..d4172de 100644 --- a/drivers/crypto/qat/qat_dh895xcc/adf_isr.c +++ b/drivers/crypto/qat/qat_dh895xcc/adf_isr.c @@ -172,7 +172,7 @@ static int adf_isr_alloc_msix_entry_table(struct adf_accel_dev *accel_dev) if (!entries) return -ENOMEM; - names = kzalloc(msix_num_entries * sizeof(char *), GFP_KERNEL); + names = kcalloc(msix_num_entries, sizeof(char *), GFP_KERNEL); if (!names) { kfree(entries); return -ENOMEM; |