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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:24 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2016-12-30 19:52:28 +0800
commit841d6d10b38a2508c640ce7784bad825e2d76fe8 (patch)
tree320afc66e3c25a9e500d73a75096712b1fd56e43 /drivers/crypto/qat
parent4f78ce870a4da0cf4db265ec4fd31eb4fb7f9c57 (diff)
downloadop-kernel-dev-841d6d10b38a2508c640ce7784bad825e2d76fe8.zip
op-kernel-dev-841d6d10b38a2508c640ce7784bad825e2d76fe8.tar.gz
crypto: qat - zero esram only for DH85x devices
Zero embedded ram in DH85x devices. This is not needed for newer generations as it is done by HW. Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat')
-rw-r--r--drivers/crypto/qat/qat_common/qat_hal.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c
index 1e480f1..8c4fd25 100644
--- a/drivers/crypto/qat/qat_common/qat_hal.c
+++ b/drivers/crypto/qat/qat_common/qat_hal.c
@@ -456,7 +456,7 @@ static int qat_hal_init_esram(struct icp_qat_fw_loader_handle *handle)
unsigned int csr_val;
int times = 30;
- if (handle->pci_dev->device == ADF_C3XXX_PCI_DEVICE_ID)
+ if (handle->pci_dev->device != ADF_DH895XCC_PCI_DEVICE_ID)
return 0;
csr_val = ADF_CSR_RD(csr_addr, 0);
@@ -716,7 +716,7 @@ int qat_hal_init(struct adf_accel_dev *accel_dev)
(void __iomem *)((uintptr_t)handle->hal_cap_ae_xfer_csr_addr_v +
LOCAL_TO_XFER_REG_OFFSET);
handle->pci_dev = pci_info->pci_dev;
- if (handle->pci_dev->device != ADF_C3XXX_PCI_DEVICE_ID) {
+ if (handle->pci_dev->device == ADF_DH895XCC_PCI_DEVICE_ID) {
sram_bar =
&pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)];
handle->hal_sram_addr_v = sram_bar->virt_addr;
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