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authorDan Streetman <ddstreet@ieee.org>2015-06-02 15:22:10 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2015-06-04 15:04:59 +0800
commit3154de71258a32040214fda174e67b975b0810ef (patch)
tree624e35114cfb2dce9443d7afa58ccf7df2136bf1 /drivers/crypto/nx
parentb08b6b779112dd7c862d86780b5155d382f3cef6 (diff)
downloadop-kernel-dev-3154de71258a32040214fda174e67b975b0810ef.zip
op-kernel-dev-3154de71258a32040214fda174e67b975b0810ef.tar.gz
crypto: nx - fix nx-842 pSeries driver minimum buffer size
Reduce the nx-842 pSeries driver minimum buffer size from 128 to 8. Also replace the single use of IO_BUFFER_ALIGN macro with the standard and correct DDE_BUFFER_ALIGN. The hw sometimes rejects buffers that contain padding past the end of the 8-byte aligned section where it sees the "end" marker. With the minimum buffer size set too high, some highly compressed buffers were being padded and the hw was incorrectly rejecting them; this sets the minimum correctly so there will be no incorrect padding. Signed-off-by: Dan Streetman <ddstreet@ieee.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/nx')
-rw-r--r--drivers/crypto/nx/nx-842-pseries.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/crypto/nx/nx-842-pseries.c b/drivers/crypto/nx/nx-842-pseries.c
index 17f1917..41bc551 100644
--- a/drivers/crypto/nx/nx-842-pseries.c
+++ b/drivers/crypto/nx/nx-842-pseries.c
@@ -30,13 +30,10 @@ MODULE_LICENSE("GPL");
MODULE_AUTHOR("Robert Jennings <rcj@linux.vnet.ibm.com>");
MODULE_DESCRIPTION("842 H/W Compression driver for IBM Power processors");
-/* IO buffer must be 128 byte aligned */
-#define IO_BUFFER_ALIGN 128
-
static struct nx842_constraints nx842_pseries_constraints = {
- .alignment = IO_BUFFER_ALIGN,
+ .alignment = DDE_BUFFER_ALIGN,
.multiple = DDE_BUFFER_LAST_MULT,
- .minimum = IO_BUFFER_ALIGN,
+ .minimum = DDE_BUFFER_LAST_MULT,
.maximum = PAGE_SIZE, /* dynamic, max_sync_size */
};
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