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| author | Tudor Ambarus <tudor-dan.ambarus@nxp.com> | 2016-09-30 12:09:39 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2016-10-02 22:33:45 +0800 |
| commit | f97581cfa6e7db9818520597b8a44f8268d75013 (patch) | |
| tree | 3142b5190712e36c9c3d143086de0a1151c6f27a /drivers/crypto/caam/regs.h | |
| parent | 81422badb39078fde1ffcecda3caac555226fc7b (diff) | |
| download | op-kernel-dev-f97581cfa6e7db9818520597b8a44f8268d75013.zip op-kernel-dev-f97581cfa6e7db9818520597b8a44f8268d75013.tar.gz | |
crypto: caam - treat SGT address pointer as u64
Even for i.MX, CAAM is able to use address pointers greater than
32 bits, the address pointer field being interpreted as a double word.
Enforce u64 address pointer in the sec4_sg_entry struct.
This patch fixes the SGT address pointer endianness issue for
32bit platforms where core endianness != caam endianness.
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/caam/regs.h')
| -rw-r--r-- | drivers/crypto/caam/regs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index b3c5016..84d2f83 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -196,6 +196,14 @@ static inline u64 rd_reg64(void __iomem *reg) #define caam_dma_to_cpu(value) caam32_to_cpu(value) #endif /* CONFIG_ARCH_DMA_ADDR_T_64BIT */ +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_IMX +#define cpu_to_caam_dma64(value) \ + (((u64)cpu_to_caam32(lower_32_bits(value)) << 32) | \ + (u64)cpu_to_caam32(upper_32_bits(value))) +#else +#define cpu_to_caam_dma64(value) cpu_to_caam64(value) +#endif + /* * jr_outentry * Represents each entry in a JobR output ring |
