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authorDaniel Thompson <daniel.thompson@linaro.org>2015-06-10 21:09:37 +0100
committerStephen Boyd <sboyd@codeaurora.org>2015-06-22 16:17:01 -0700
commit358bdf892f6bfacf20884b54a35ab038321f06f9 (patch)
treec4505e8178f562ebf7798a38cd03226f1c6e8cfb /drivers/cpufreq/Kconfig.arm
parent41655239eaed741ac8da066bc43c2483c78e61ec (diff)
downloadop-kernel-dev-358bdf892f6bfacf20884b54a35ab038321f06f9.zip
op-kernel-dev-358bdf892f6bfacf20884b54a35ab038321f06f9.tar.gz
clk: stm32: Add clock driver for STM32F4[23]xxx devices
The driver supports decoding and statically modelling PLL state (i.e. we inherit state from bootloader) and provides support for all peripherals that support simple one-bit gated clocks. The covers all peripherals whose clocks come from the AHB, APB1 or APB2 buses. It has been tested on an STM32F429I-Discovery board. The clock counts for TIM2, USART1 and SYSTICK are all set correctly and the wall clock looks OK when checked with a stopwatch. I have also tested a prototype driver for the RNG hardware. The RNG clock is correctly enabled by the framework (also did inverse test and proved that by changing DT to configure the wrong clock bit then we observe the RNG driver to fail). Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Reviewed-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> [sboyd@codeaurora.org: Silence sparse warnings] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/cpufreq/Kconfig.arm')
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