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| author | Arnd Bergmann <arnd@arndb.de> | 2013-04-19 23:15:58 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-04-20 00:35:17 +0200 |
| commit | 2254c36ddeb87d4975d2e4709413dd275a913e83 (patch) | |
| tree | f0b8c52e5d3a0727e8e75f41085fd6b0819d8daf /drivers/clocksource | |
| parent | 22cf644e03419b4c3d002109b021c7482306f0bf (diff) | |
| parent | 20adee8fa06ef69012bc277739e9e3762c78b7b7 (diff) | |
| download | op-kernel-dev-2254c36ddeb87d4975d2e4709413dd275a913e83.zip op-kernel-dev-2254c36ddeb87d4975d2e4709413dd275a913e83.tar.gz | |
Merge branch 'samsung/exynos-multiplatform-drivers' into late/multiplatform
This series contains the final pieces for Exynos multiplatform support:
Most of the patches are about the exynos-combiner irqchip, which is
converted to not rely on platform provided constants.
* samsung/exynos-multiplatform-drivers:
ARM: exynos: restore mach/regs-clock.h for exynos5
irqchip: exynos: look up irq using irq_find_mapping
irqchip: exynos: pass irq_base from platform
irqchip: exynos: localize irq lookup for ATAGS
irqchip: exynos: allocate combiner_data dynamically
irqchip: exynos: pass max combiner number to combiner_init
ARM: exynos: add missing properties for combiner IRQs
clocksource: exynos_mct: remove platform header dependency
clk: exynos: prepare for multiplatform
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/exynos_mct.c | 21 |
1 files changed, 6 insertions, 15 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 6610268..a6ca0fb 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -26,11 +26,6 @@ #include <asm/arch_timer.h> #include <asm/localtimer.h> - -#include <plat/cpu.h> - -#include <mach/map.h> -#include <mach/irqs.h> #include <asm/mach/time.h> #define EXYNOS4_MCTREG(x) (x) @@ -511,18 +506,14 @@ static void __init exynos4_timer_resources(struct device_node *np, void __iomem #endif /* CONFIG_LOCAL_TIMERS */ } -void __init mct_init(void) +void __init mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1) { - if (soc_is_exynos4210()) { - mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0; - mct_irqs[MCT_L0_IRQ] = EXYNOS4_IRQ_MCT_L0; - mct_irqs[MCT_L1_IRQ] = EXYNOS4_IRQ_MCT_L1; - mct_int_type = MCT_INT_SPI; - } else { - panic("unable to determine mct controller type\n"); - } + mct_irqs[MCT_G0_IRQ] = irq_g0; + mct_irqs[MCT_L0_IRQ] = irq_l0; + mct_irqs[MCT_L1_IRQ] = irq_l1; + mct_int_type = MCT_INT_SPI; - exynos4_timer_resources(NULL, S5P_VA_SYSTIMER); + exynos4_timer_resources(NULL, base); exynos4_clocksource_init(); exynos4_clockevent_init(); } |
