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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-03-04 12:59:54 +0100
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2014-04-16 12:03:25 +0200
commitf92d62f53973466cccb25900c2597ff6df950d74 (patch)
tree8af4782ca5d61fe30c4c03a2f0392ff1297b2d48 /drivers/clocksource/sh_mtu2.c
parent276bee05d8b72e98d530b55161e0a2131da99f58 (diff)
downloadop-kernel-dev-f92d62f53973466cccb25900c2597ff6df950d74.zip
op-kernel-dev-f92d62f53973466cccb25900c2597ff6df950d74.tar.gz
clocksource: sh_mtu2: Turn sh_mtu2_priv fields into local variables
The rate and periodic fields are used in a single function only, as local variables. Remove them from the structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Wolfram Sang <wsa@sang-engineering.com>
Diffstat (limited to 'drivers/clocksource/sh_mtu2.c')
-rw-r--r--drivers/clocksource/sh_mtu2.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
index 77992e0..6668455 100644
--- a/drivers/clocksource/sh_mtu2.c
+++ b/drivers/clocksource/sh_mtu2.c
@@ -39,8 +39,6 @@ struct sh_mtu2_priv {
struct clk *clk;
int irq;
struct platform_device *pdev;
- unsigned long rate;
- unsigned long periodic;
struct clock_event_device ced;
};
@@ -122,6 +120,8 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
static int sh_mtu2_enable(struct sh_mtu2_priv *p)
{
+ unsigned long periodic;
+ unsigned long rate;
int ret;
pm_runtime_get_sync(&p->pdev->dev);
@@ -137,13 +137,13 @@ static int sh_mtu2_enable(struct sh_mtu2_priv *p)
/* make sure channel is disabled */
sh_mtu2_start_stop_ch(p, 0);
- p->rate = clk_get_rate(p->clk) / 64;
- p->periodic = (p->rate + HZ/2) / HZ;
+ rate = clk_get_rate(p->clk) / 64;
+ periodic = (rate + HZ/2) / HZ;
/* "Periodic Counter Operation" */
sh_mtu2_write(p, TCR, 0x23); /* TGRA clear, divide clock by 64 */
sh_mtu2_write(p, TIOR, 0);
- sh_mtu2_write(p, TGR, p->periodic);
+ sh_mtu2_write(p, TGR, periodic);
sh_mtu2_write(p, TCNT, 0);
sh_mtu2_write(p, TMDR, 0);
sh_mtu2_write(p, TIER, 0x01);
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