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author | Stephen Boyd <sboyd@codeaurora.org> | 2013-11-20 00:47:32 +0100 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-12-11 11:40:24 +0100 |
commit | dfded00902d7437963870accbcf4b39114e85f59 (patch) | |
tree | 81156ba2cf4bf1574f007d9d1a9b0f23882dc320 /drivers/clocksource/cadence_ttc_timer.c | |
parent | af066fce5fa6b615588732cad6909c450a9eb616 (diff) | |
download | op-kernel-dev-dfded00902d7437963870accbcf4b39114e85f59.zip op-kernel-dev-dfded00902d7437963870accbcf4b39114e85f59.tar.gz |
clocksource: cadence_ttc_timer: Switch to sched_clock_register()
The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface.
Cc: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource/cadence_ttc_timer.c')
-rw-r--r-- | drivers/clocksource/cadence_ttc_timer.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index b2bb3a4b..b865b4e 100644 --- a/drivers/clocksource/cadence_ttc_timer.c +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -158,7 +158,7 @@ static cycle_t __ttc_clocksource_read(struct clocksource *cs) TTC_COUNT_VAL_OFFSET); } -static u32 notrace ttc_sched_clock_read(void) +static u64 notrace ttc_sched_clock_read(void) { return __raw_readl(ttc_sched_clock_val_reg); } @@ -306,7 +306,7 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base) } ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET; - setup_sched_clock(ttc_sched_clock_read, 16, + sched_clock_register(ttc_sched_clock_read, 16, clk_get_rate(ttccs->ttc.clk) / PRESCALE); } |