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authorThierry Reding <treding@nvidia.com>2014-08-01 10:44:20 +0200
committerThierry Reding <treding@nvidia.com>2015-04-10 16:03:48 +0200
commit6bb18c532d08438f4ae4e282da6d12e86a86dcfb (patch)
tree4ccb9479d993955a14e1154c29d18084085b28a8 /drivers/clk
parent04794d982e830d4fdc39c1e1b8699fe53a7bd947 (diff)
downloadop-kernel-dev-6bb18c532d08438f4ae4e282da6d12e86a86dcfb.zip
op-kernel-dev-6bb18c532d08438f4ae4e282da6d12e86a86dcfb.tar.gz
clk: tegra: Various whitespace cleanups
Make usage of blank lines as separators more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/tegra/clk-pll.c1
-rw-r--r--drivers/clk/tegra/clk-tegra114.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index bfef9ab..f9950dd 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -1223,6 +1223,7 @@ static long _pllre_calc_rate(struct tegra_clk_pll *pll,
return output_rate;
}
+
static int clk_pllre_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index d076642..75d8af6 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -1263,6 +1263,7 @@ static void tegra114_wait_cpu_in_reset(u32 cpu)
cpu_relax();
} while (!(reg & (1 << cpu))); /* check CPU been reset or not */
}
+
static void tegra114_disable_cpu_clock(u32 cpu)
{
/* flow controller would take care in the power sequence. */
@@ -1351,7 +1352,6 @@ static void __init tegra114_clock_apply_init_table(void)
tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX);
}
-
/**
* tegra114_car_barrier - wait for pending writes to the CAR to complete
*
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