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author | Rahul Sharma <rahul.sharma@samsung.com> | 2013-08-29 11:07:07 +0530 |
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committer | Mike Turquette <mturquette@linaro.org> | 2013-08-29 17:48:00 -0700 |
commit | 14d87cda8dc6d35b2a6cbbc1e1a5f6df4d9645ae (patch) | |
tree | 82e6fc1b8678a0e555f998061d27473ad18cb1a1 /drivers/clk | |
parent | 9b229d8b04b4050938257e1f2a12860670e52e80 (diff) | |
download | op-kernel-dev-14d87cda8dc6d35b2a6cbbc1e1a5f6df4d9645ae.zip op-kernel-dev-14d87cda8dc6d35b2a6cbbc1e1a5f6df4d9645ae.tar.gz |
clk/exynos5420: fix the order of parents of hdmi mux
Listing sclk_hdmiphy at 0th position in the list of parents is
causing wrong configuration in reg SRC_DISP10.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 4e0c13e..522c033 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -286,7 +286,7 @@ PNAME(audio2_p) = { "fin_pll", "cdclk2", "sclk_dpll", "sclk_mpll", "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" }; PNAME(spdif_p) = { "fin_pll", "dout_audio0", "dout_audio1", "dout_audio2", "spdif_extclk", "sclk_ipll", "sclk_epll", "sclk_rpll" }; -PNAME(hdmi_p) = { "sclk_hdmiphy", "dout_hdmi_pixel" }; +PNAME(hdmi_p) = { "dout_hdmi_pixel", "sclk_hdmiphy" }; PNAME(maudio0_p) = { "fin_pll", "maudio_clk", "sclk_dpll", "sclk_mpll", "sclk_spll", "sclk_ipll", "sclk_epll", "sclk_rpll" }; |