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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2015-07-21 14:37:57 +0200 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2016-02-25 12:09:57 +0100 |
| commit | f190a87e27aeb21b230bfb9eb5da2775bfdfb7e4 (patch) | |
| tree | 8f8608e1265c4ea958a46071043e819db29081d3 /drivers/clk | |
| parent | a665d30f1f2575df864e706dc8209458b8f4cf88 (diff) | |
| download | op-kernel-dev-f190a87e27aeb21b230bfb9eb5da2775bfdfb7e4.zip op-kernel-dev-f190a87e27aeb21b230bfb9eb5da2775bfdfb7e4.tar.gz | |
clk: samsung: exynos5433: Fix definitions of SCLK ISP SENSOR0 clocks
This fixes bit field offsets in the CMU_TOP CLK_DIV_SCLK_ISP_SENSOR_{A,B}
clock definitions.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5433.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index cf096f9..a1dfcb8 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -490,9 +490,9 @@ static struct samsung_div_clock top_div_clks[] __initdata = { DIV(CLK_DIV_SCLK_ISP_SENSOR1_A, "div_sclk_isp_sensor1_a", "mout_sclk_isp_sensor1", DIV_TOP_CAM11, 8, 4), DIV(CLK_DIV_SCLK_ISP_SENSOR0_B, "div_sclk_isp_sensor0_b", - "div_sclk_isp_sensor0_a", DIV_TOP_CAM11, 12, 4), + "div_sclk_isp_sensor0_a", DIV_TOP_CAM11, 4, 4), DIV(CLK_DIV_SCLK_ISP_SENSOR0_A, "div_sclk_isp_sensor0_a", - "mout_sclk_isp_sensor0", DIV_TOP_CAM11, 8, 4), + "mout_sclk_isp_sensor0", DIV_TOP_CAM11, 0, 4), /* DIV_TOP_FSYS0 */ DIV(CLK_DIV_SCLK_MMC1_B, "div_sclk_mmc1_b", "div_sclk_mmc1_a", |
