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author | Jonghwa Lee <jonghwa3.lee@samsung.com> | 2015-05-06 21:24:20 +0900 |
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committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2016-02-25 12:10:00 +0100 |
commit | a6cb74cbc927af04af827ef590082f9717ffad51 (patch) | |
tree | 4ed70f3a97dd2336d8c63ac8b3fc06e74190d280 /drivers/clk | |
parent | 3795e0f6e484ec735f750dc3c39295138e98fba2 (diff) | |
download | op-kernel-dev-a6cb74cbc927af04af827ef590082f9717ffad51.zip op-kernel-dev-a6cb74cbc927af04af827ef590082f9717ffad51.tar.gz |
clk: samsung: exynos5433: Fix wrong registers of PCLK_GSCL_SMMU clocks
This fixes register assignment in the CLK_PCLK_SMMU_GSCL{1,2}
clocks definition.
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/samsung/clk-exynos5433.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 23dd651..707a814 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -3411,11 +3411,11 @@ static struct samsung_gate_clock gscl_gate_clks[] __initdata = { /* ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL1 */ GATE(CLK_PCLK_SMMU_GSCL1, "pclk_smmu_gscl1", "mout_aclk_gscl_111_user", - ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL0, 0, 0, 0), + ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL1, 0, 0, 0), /* ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL2 */ GATE(CLK_PCLK_SMMU_GSCL2, "pclk_smmu_gscl2", "mout_aclk_gscl_111_user", - ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL0, 0, 0, 0), + ENABLE_PCLK_GSCL_SECURE_SMMU_GSCL2, 0, 0, 0), }; static struct samsung_cmu_info gscl_cmu_info __initdata = { |