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| author | Heiko Stuebner <heiko@sntech.de> | 2016-03-15 17:34:56 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-05-09 16:04:39 +0200 |
| commit | 7e5385dc722258c862f969ab7e67907156ad0e3f (patch) | |
| tree | bf14b888a642a1edecef0ac7b8c33a99ade1219c /drivers/clk | |
| parent | c9c3c6eecc5533d14bb9bc82319257eb8bc52768 (diff) | |
| download | op-kernel-dev-7e5385dc722258c862f969ab7e67907156ad0e3f.zip op-kernel-dev-7e5385dc722258c862f969ab7e67907156ad0e3f.tar.gz | |
clk: rockchip: drop old_rate calculation on pll rate changes
Previously when everything happened in the set_rate callbacks itself we
needed the old_rate value for the possible rate rollback, so that made
it easy to also use it in the debug output.
Now with the param-handling being done in separate functions, reading and
recalculating the current pll rate only to use it in a debug message that
won't get displayed in regular cases anyway is quite a waste.
Therefore drop that value from the debug output. In the worst case that
previous rate will have been displayed on the rate change before.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/rockchip/clk-pll.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index 76e278d..db81e45 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -247,10 +247,9 @@ static int rockchip_rk3036_pll_set_rate(struct clk_hw *hw, unsigned long drate, { struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); const struct rockchip_pll_rate_table *rate; - unsigned long old_rate = rockchip_rk3036_pll_recalc_rate(hw, prate); - pr_debug("%s: changing %s from %lu to %lu with a parent rate of %lu\n", - __func__, __clk_get_name(hw->clk), old_rate, drate, prate); + pr_debug("%s: changing %s to %lu with a parent rate of %lu\n", + __func__, __clk_get_name(hw->clk), drate, prate); /* Get required rate settings from table */ rate = rockchip_get_pll_settings(pll, drate); @@ -479,10 +478,9 @@ static int rockchip_rk3066_pll_set_rate(struct clk_hw *hw, unsigned long drate, { struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); const struct rockchip_pll_rate_table *rate; - unsigned long old_rate = rockchip_rk3066_pll_recalc_rate(hw, prate); - pr_debug("%s: changing %s from %lu to %lu with a parent rate of %lu\n", - __func__, clk_hw_get_name(hw), old_rate, drate, prate); + pr_debug("%s: changing %s to %lu with a parent rate of %lu\n", + __func__, clk_hw_get_name(hw), drate, prate); /* Get required rate settings from table */ rate = rockchip_get_pll_settings(pll, drate); @@ -725,10 +723,9 @@ static int rockchip_rk3399_pll_set_rate(struct clk_hw *hw, unsigned long drate, { struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); const struct rockchip_pll_rate_table *rate; - unsigned long old_rate = rockchip_rk3399_pll_recalc_rate(hw, prate); - pr_debug("%s: changing %s from %lu to %lu with a parent rate of %lu\n", - __func__, __clk_get_name(hw->clk), old_rate, drate, prate); + pr_debug("%s: changing %s to %lu with a parent rate of %lu\n", + __func__, __clk_get_name(hw->clk), drate, prate); /* Get required rate settings from table */ rate = rockchip_get_pll_settings(pll, drate); |
