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author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2013-07-19 10:16:44 -0700 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2013-08-20 07:54:40 +0200 |
commit | 14924ba288921c536a72e71baeb14322ece44b39 (patch) | |
tree | 229b2107dc9870c8ad0159da5deb4ed4f2d602a4 /drivers/clk/zynq/pll.c | |
parent | 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b (diff) | |
download | op-kernel-dev-14924ba288921c536a72e71baeb14322ece44b39.zip op-kernel-dev-14924ba288921c536a72e71baeb14322ece44b39.tar.gz |
clk/zynq/pll: Fix documentation for PLL register function
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/clk/zynq/pll.c')
-rw-r--r-- | drivers/clk/zynq/pll.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c index 47e307c..6daa7b6 100644 --- a/drivers/clk/zynq/pll.c +++ b/drivers/clk/zynq/pll.c @@ -182,7 +182,13 @@ static const struct clk_ops zynq_pll_ops = { /** * clk_register_zynq_pll() - Register PLL with the clock framework - * @np Pointer to the DT device node + * @name PLL name + * @parent Parent clock name + * @pll_ctrl Pointer to PLL control register + * @pll_status Pointer to PLL status register + * @lock_index Bit index to this PLL's lock status bit in @pll_status + * @lock Register lock + * Returns handle to the registered clock. */ struct clk *clk_register_zynq_pll(const char *name, const char *parent, void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, |