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authorStephen Warren <swarren@nvidia.com>2013-11-06 16:58:16 -0700
committerStephen Warren <swarren@nvidia.com>2013-12-11 16:45:07 -0700
commit2ae77527bb1a510070d039aaa22d1ae9a5807b6f (patch)
tree06ea872a6286a8d0bddbf4df7a35d2e827ba45c4 /drivers/clk/tegra/clk-periph-gate.c
parent74511c4befe40731b175f81684d446c4300d6060 (diff)
downloadop-kernel-dev-2ae77527bb1a510070d039aaa22d1ae9a5807b6f.zip
op-kernel-dev-2ae77527bb1a510070d039aaa22d1ae9a5807b6f.tar.gz
clk: tegra: remove legacy reset APIs
Now that no code uses the custom Tegra module reset API, we can remove its implementation. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-periph-gate.c')
-rw-r--r--drivers/clk/tegra/clk-periph-gate.c22
1 files changed, 0 insertions, 22 deletions
diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c
index f38f33e..5070153 100644
--- a/drivers/clk/tegra/clk-periph-gate.c
+++ b/drivers/clk/tegra/clk-periph-gate.c
@@ -36,8 +36,6 @@ static DEFINE_SPINLOCK(periph_ref_lock);
#define read_rst(gate) \
readl_relaxed(gate->clk_base + (gate->regs->rst_reg))
-#define write_rst_set(val, gate) \
- writel_relaxed(val, gate->clk_base + (gate->regs->rst_set_reg))
#define write_rst_clr(val, gate) \
writel_relaxed(val, gate->clk_base + (gate->regs->rst_clr_reg))
@@ -123,26 +121,6 @@ static void clk_periph_disable(struct clk_hw *hw)
spin_unlock_irqrestore(&periph_ref_lock, flags);
}
-void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert)
-{
- if (gate->flags & TEGRA_PERIPH_NO_RESET)
- return;
-
- if (assert) {
- /*
- * If peripheral is in the APB bus then read the APB bus to
- * flush the write operation in apb bus. This will avoid the
- * peripheral access after disabling clock
- */
- if (gate->flags & TEGRA_PERIPH_ON_APB)
- tegra_read_chipid();
-
- write_rst_set(periph_clk_to_bit(gate), gate);
- } else {
- write_rst_clr(periph_clk_to_bit(gate), gate);
- }
-}
-
const struct clk_ops tegra_clk_periph_gate_ops = {
.is_enabled = clk_periph_is_enabled,
.enable = clk_periph_enable,
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