diff options
author | Michael Turquette <mturquette@baylibre.com> | 2016-07-21 17:30:54 -0700 |
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committer | Michael Turquette <mturquette@baylibre.com> | 2016-07-21 17:30:54 -0700 |
commit | d22527fed2f094c2e4f9a66f35b68a090c3d906a (patch) | |
tree | 4c234f16ec9ca21c48e33ae0edd373d3b6b5d52a /drivers/clk/sunxi | |
parent | b328d2c110ad7b45af9cde2bce70803df28e9553 (diff) | |
parent | f96423f483b1a7854270335b319e8d1cdd6f3585 (diff) | |
download | op-kernel-dev-d22527fed2f094c2e4f9a66f35b68a090c3d906a.zip op-kernel-dev-d22527fed2f094c2e4f9a66f35b68a090c3d906a.tar.gz |
Merge branch 'clk-fixes' into clk-next
Diffstat (limited to 'drivers/clk/sunxi')
-rw-r--r-- | drivers/clk/sunxi/clk-sun4i-display.c | 5 | ||||
-rw-r--r-- | drivers/clk/sunxi/clk-sun4i-tcon-ch1.c | 4 |
2 files changed, 4 insertions, 5 deletions
diff --git a/drivers/clk/sunxi/clk-sun4i-display.c b/drivers/clk/sunxi/clk-sun4i-display.c index 445a749..9780fac 100644 --- a/drivers/clk/sunxi/clk-sun4i-display.c +++ b/drivers/clk/sunxi/clk-sun4i-display.c @@ -33,6 +33,8 @@ struct sun4i_a10_display_clk_data { u8 width_div; u8 width_mux; + + u32 flags; }; struct reset_data { @@ -166,7 +168,7 @@ static void __init sun4i_a10_display_init(struct device_node *node, data->has_div ? &div->hw : NULL, data->has_div ? &clk_divider_ops : NULL, &gate->hw, &clk_gate_ops, - 0); + data->flags); if (IS_ERR(clk)) { pr_err("%s: Couldn't register the clock\n", clk_name); goto free_div; @@ -232,6 +234,7 @@ static const struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data __initcon .offset_rst = 29, .offset_mux = 24, .width_mux = 2, + .flags = CLK_SET_RATE_PARENT, }; static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node) diff --git a/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c b/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c index 98a4582..b6d29d1 100644 --- a/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c +++ b/drivers/clk/sunxi/clk-sun4i-tcon-ch1.c @@ -79,15 +79,11 @@ static int tcon_ch1_is_enabled(struct clk_hw *hw) static u8 tcon_ch1_get_parent(struct clk_hw *hw) { struct tcon_ch1_clk *tclk = hw_to_tclk(hw); - int num_parents = clk_hw_get_num_parents(hw); u32 reg; reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT; reg &= reg >> TCON_CH1_SCLK2_MUX_MASK; - if (reg >= num_parents) - return -EINVAL; - return reg; } |